Gate Driver Charge Sharing Module Reduces Power Consumption
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing gate drivers for LCD monitors face challenges in efficiently adjusting waveforms of gate driving signals, leading to increased power consumption and extra costs, while also risking the generation of abnormal image contents due to parasitic capacitors coupling with gate signals.
Innovation Solution
A gate driver with a logic circuit, buffers, and a charge sharing module that generates switch signals to control voltage sources and share charges during the forward and backward edges of gate driving signals, reducing power consumption and avoiding coupling effects through charge recycling and re-utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the gate driver adjusts waveforms of gate driving signals to mitigate coupling effects, then image quality is improved, but power consumption increases and system cost increases
Solution Approach 1:
The patent converts the harmful coupling effect into a beneficial charge transfer mechanism. By intentionally allowing parasitic capacitors to couple during the backward edge of gate signals, the invention recovers charge that would otherwise be lost, and redirects it to adjacent pixels. This transforms the harmful coupling into a useful charge recycling mechanism that reduces power consumption while maintaining image quality.
Solution Approach 2:
The patent recovers charge that would normally be discarded during the operation of the gate driver. By capturing the charge transferred through parasitic capacitors during signal transitions and redirecting it to useful purposes (charging adjacent pixels or returning it to the voltage source), the system recovers energy that would otherwise be wasted, thereby reducing overall power consumption.
2Productivity
If the gate driver operates at fast speed to meet requirements, then productivity is improved, but abnormal image contents are generated due to parasitic capacitors coupling
Solution Approach 1:
The patent applies preliminary action by proactively managing the charge coupling that occurs during fast gate signal transitions. Before abnormal image contents can be generated, the invention anticipates the charge transfer through parasitic capacitors and deliberately controls this process by adjusting signal waveforms and timing. This preliminary control prevents the harmful effects while maintaining fast operation speed.
Solution Approach 2:
The patent converts the harmful parasitic coupling effect into a beneficial mechanism by intentionally utilizing the charge transfer that occurs during fast transitions. Instead of trying to eliminate the coupling, the invention harnesses it to transfer charge to adjacent pixels or recycle it, thereby maintaining high-speed operation while preventing abnormal image contents.
3Manufacturing precision
If additional control circuits are added to adjust waveforms and mitigate coupling effects, then image quality is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing control circuits that perform multiple functions simultaneously. The same control logic that adjusts gate signal waveforms also manages charge recycling and mitigates coupling effects across multiple pixels. By making the control circuit multi-functional, the invention avoids adding separate dedicated circuits for each function, thereby improving image quality without proportionally increasing device complexity.
Solution Approach 2:
The patent merges multiple functions into unified control mechanisms. Instead of having separate circuits for waveform adjustment, charge management, and coupling mitigation, the invention combines these functions into integrated control logic that handles all tasks through coordinated operation of shared circuit elements, thereby reducing overall device complexity.
Data Source
AI summary
A gate driver for controlling a display apparatus is provided. The gate driver includes a logic circuit, a plurality of buffers, and a charge sharing module. The logic circuit generates a plurality of switch signals. The buffers are coupled to the logic circuit. Each of the buffers determines to provide a first voltage or a second voltage according to one of the switch signals to generate a gate driving signal. The charge sharing module is coupled to the output ends of the buffers and allows the output ends of the buffers to share charges according to a plurality of sharing signals during a forward edge and a backward edge of a square wave of each of the gate driving signals. Furthermore, a gate driving method for controlling a display apparatus is also provided.


