Gate Driver Circuit for Rapid Output Fall Without Transistor Deterioration
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Solution Overview
Problem
Conventional gate drivers in liquid crystal display devices suffer from prolonged gate-output fall time, which limits the improvement in display definition and panel size, and applying high voltage to gate-output fall transistors leads to transistor deterioration.
Innovation Solution
A scanning signal line drive circuit with a shift register using multiple unit circuits, each equipped with a first and second non-selection level voltage, and transistors for stabilization and control, allowing the gate output to fall rapidly without transistor deterioration by temporarily reducing the scanning signal voltage to a lower level.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high voltage is applied to the gate terminal of the gate-output fall transistor to enhance drive capability, then the gate-output fall time is reduced, but the transistor deteriorates significantly
Solution Approach 1:
The gate driver is divided into multiple independent unit circuits, each capable of driving individual gate bus lines. This segmentation allows each transistor to operate within safe voltage limits while the collective system achieves the required performance through parallel operation of multiple units.
Solution Approach 2:
The invention changes the voltage parameters by providing two different gate low voltage levels (first gate low voltage and second gate low voltage) instead of using a single high voltage level. This parameter change allows the gate-output fall transistor to operate with enhanced drive capability during falling edges while maintaining transistor durability through lower voltage levels during other operations.
2Reliability
If the gate-output fall time is prolonged to ensure sufficient voltage transition, then the horizontal scanning period becomes longer, but the display definition and panel size improvement are limited
Solution Approach 1:
The invention implements dynamic voltage control where the gate low voltage level changes based on the operational phase. During the falling edge transition, the second gate low voltage (lower level) is applied to enhance the voltage difference and accelerate the transition. During other phases, the first gate low voltage (higher level) is used to maintain stability. This dynamic adjustment ensures complete voltage transitions while maintaining fast scanning speeds.
Solution Approach 2:
By changing the voltage parameter levels dynamically - using a lower second gate low voltage level during falling edges to maximize the voltage difference across the transistor - the invention achieves faster gate-output fall times without compromising the completeness of voltage transitions, thereby enabling shorter horizontal scanning periods.
3Device complexity
If a single gate low voltage level is used to simplify the circuit, then the device complexity is reduced, but the gate-output fall time cannot be sufficiently reduced
Solution Approach 1:
The gate driver circuit is designed with multi-functionality where the same basic circuit structure serves multiple purposes: it provides stable operation during normal phases using the first gate low voltage, and achieves enhanced falling edge performance using the second gate low voltage. This universal design approach allows the circuit to handle different operational requirements without needing completely separate circuits for each function.
Solution Approach 2:
The invention prepares two gate low voltage levels in advance, allowing the circuit to switch between them based on operational needs. The second gate low voltage is pre-configured to be available when needed for falling edge transitions, enabling rapid voltage changes without requiring complex real-time calculation or adjustment mechanisms.
Data Source
AI summary
A gate driver (scanning signal line drive circuit) that can allow a gate output to promptly fall without causing a deterioration in a transistor is implemented. A gate-output fall transistor (T01) and a gate-output stabilization transistor (T02) are provided near an output portion of the unit circuit that constitutes a shift register. A first gate low voltage (Vgl1) having a voltage level that is conventionally used to bring pixel TFTs into an off state is provided to a source terminal of the gate-output stabilization transistor (T02), and a second gate low voltage (Vgl2) having a lower voltage level than the first gate low voltage (Vgl1) is provided to a source terminal of the gate-output fall transistor (T01). Upon allowing the gate output to fall, the gate-output fall transistor (T01) is brought into an on state and then the gate-output stabilization transistor (T02) is brought into an on state.