Gate Driver Circuit Voltage Difference Reduction
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Solution Overview
Problem
In display devices, the voltage difference between output lines of the gate driver circuit affects the circuit structure and panel load, leading to variations in transition time, which complicates the design and increases the size of the non-display area, hindering the miniaturization of the display device.
Innovation Solution
A gate driver circuit is implemented with a first gate driver and a second gate driver disposed on opposing sides of the display panel, where odd-numbered output lines of one gate driver are connected to even-numbered output lines of the other, and even-numbered output lines of one gate driver are connected to odd-numbered output lines of the other, to reduce the voltage difference between output lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single gate driver circuit is used, then the circuit structure is simple, but the voltage difference between output lines causes variation in transition time and increases the non-display area
Solution Approach 1:
The gate driver circuit is divided into multiple independent gate drivers (first gate driver and second gate driver). Each gate driver independently drives alternating scan lines (odd-numbered and even-numbered lines), which eliminates the voltage difference issue between output lines and ensures consistent transition time across all lines.
2Area of stationary object
If gate drivers are disposed on opposing sides of the display panel, then the non-display area is reduced, but the circuit structure becomes more complex
Solution Approach 1:
The gate driver circuit is extracted from a single centralized location and distributed to opposing sides of the display panel. This extraction reduces the non-display area by utilizing the edge regions on both sides, while the modular design of multiple independent gate drivers manages the complexity.
3Manufacturing precision
If odd-numbered and even-numbered output lines are cross-connected between gate drivers, then the voltage difference is minimized and transistor size can be reduced, but the connection structure becomes more complex
Solution Approach 1:
The gate drivers are positioned asymmetrically on opposing sides of the display panel, with the first gate driver driving odd-numbered lines and the second gate driver driving even-numbered lines. This asymmetric arrangement minimizes the voltage difference between adjacent scan lines and allows for reduced transistor size, while the systematic cross-connection pattern manages the structural complexity.
Data Source
AI summary
A gate driver circuit and a display device including the same have a voltage difference between output lines of the gate driver circuit that is reduced. To this end, a first gate driver is disposed on one side of a display panel, while a second gate driver is disposed on side of the display panel opposite the one side. An odd-numbered output line of the first gate driver is connected to an even-numbered output line of the second gate driver, while an even-numbered output line of the first gate driver is connected to an odd-numbered output line of the second gate driver. Therefore, the voltage difference between the output lines of the gate driver circuit is minimized or reduced.