Gate Driver Clock Period Optimization for Display Power Reduction
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Solution Overview
Problem
Liquid crystal displays (LCDs) face increased power consumption as their size grows, necessitating a reduction in energy usage without compromising image quality.
Innovation Solution
The implementation of a display apparatus with a panel featuring gate lines and data lines, where each pixel is connected to a gate line and a data line, and a gate driver that applies distinct clock signals to control gate signals, reducing power consumption by optimizing signal periods and placement of the gate driver directly on the panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the size of the liquid crystal display is increased to display more image information, then the display area is improved, but the power consumption increases
Solution Approach 1:
The gate driver is divided into multiple stages (first stage, second stage, third stage, fourth stage) that operate in sequence. Each stage drives a portion of the gate lines, allowing the display to be scanned in segments rather than all at once, reducing peak power requirements for large displays
Solution Approach 2:
The gate driver uses periodic clock signals (first clock signal and second clock signal) to control the switching of transistors in each stage. This periodic operation allows pixels to be precharged in alternating periods, reducing the overall power consumption while maintaining the ability to drive large display areas
2Productivity
If the gate driver is disposed on the panel part, then the manufacturing efficiency is improved, but the device complexity increases
Solution Approach 1:
The gate driver is integrated directly onto the panel part rather than being a separate external component. This merging of the gate driver with the panel reduces the number of discrete components and connections, simplifying the overall device structure while improving manufacturing efficiency
Solution Approach 2:
The gate driver circuit performs multiple functions: it generates gate signals for scanning, precharges pixels during specific periods, and controls the timing of data writing. This multi-functionality is achieved within a single integrated structure on the panel, reducing device complexity while maintaining productivity benefits
Data Source
AI summary
A display apparatus includes a panel part, a data driver, and a gate driver. The panel part includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels each of which is connected to one gate line of the gate lines and one data line of the data lines. The data driver receives image data and outputs a data signal to the data lines. The gate driver part is disposed on the panel part and applies gate signals to the gate lines. Periods of clock signals controlling the level of the gate signals are different from that of the gate signals. Thus, power consumption of the display apparatus is substantially effectively reduced.