Gate Driver Clock Tree Selective Enable for Power Reduction
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Solution Overview
Problem
Electronic devices with displays face excessive power consumption due to clock signal distribution in gate driver circuitry, leading to reduced battery life.
Innovation Solution
The implementation of gate driver integrated circuits with control circuitry that enables clock signal distribution to only active clock trees, temporarily disabling inactive ones, using clock trees coupled to shift register circuitry and adjusting buffer supply to conserve power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock signals are distributed to all clock trees in gate driver circuitry, then all shift registers can be activated, but power consumption increases
Solution Approach 1:
The gate driver circuitry is divided into multiple independent sections, each with its own clock tree and shift register. The display panel is segmented into corresponding regions, allowing selective activation of only those sections currently being driven, thereby reducing power consumption while maintaining full functionality when needed.
Solution Approach 2:
The system dynamically activates or deactivates clock trees based on real-time operating conditions. The gate driver circuitry transitions from a static all-or-nothing clock distribution approach to a dynamic selective activation approach, adapting power consumption to actual display refresh requirements.
2Use of energy by moving object
If clock trees are selectively disabled to save power, then power consumption reduces, but circuit complexity increases
Solution Approach 1:
Multiple functional elements are merged into integrated circuit structures. The gate driver circuitry combines clock signal distribution, shift register control, and display panel driving functions into unified integrated circuits, reducing overall system complexity despite adding selective activation capability.
Solution Approach 2:
The gate driver circuitry incorporates self-control mechanisms where the system automatically manages clock tree activation based on its own operating state. The circuitry monitors which sections are actively being driven and autonomously activates or deactivates corresponding clock trees without requiring external control logic.
Data Source
AI summary
A display may have an array of pixels controlled by display driver circuitry. Gate driver circuitry supplies gate line signals to rows of the pixels. The gate driver circuitry may include gate driver integrated circuits. Each gate driver integrated circuit may have a shift register that supplies the gate line signals to the rows of pixels. The display driver circuitry supplies a clock signal to the gate driver integrated circuits. Each gate driver integrated circuit may have one or more clock trees that are selectively enable and disabled. Each gate driver integrated circuit may have a controller and a buffer that is controlled by a control signal from the controller. The buffer may be adjusted to supply or to not supply the clock signal to an associated clock tree in that gate driver integrated circuit.