Gate Driver Control Circuit for Dynamic Row-Scanning Order
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display technologies using gate-driver control signals for image display have inflexible scanning schemes, leading to high power consumption, especially for special images like Horizontal Stripes, as the scanning order is always fixed from top to bottom or bottom to up.
Innovation Solution
A gate driver control circuit that includes an encoder, decoder, and multiplexers to adjust timing-control signals based on instruction information, allowing for flexible adjustment of row-scanning signals and their order, enabling dynamic control of row-scanning signals to reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If fixed scanning order (top-down or bottom-up) is used for gate-driver control signals, then the control circuit is simple, but power consumption increases for special images like Horizontal Stripes
Solution Approach 1:
The patent applies dynamics by making the scanning order adjustable rather than fixed. The gate driver control circuit can dynamically change the scanning sequence based on image characteristics, transitioning from a static top-down or bottom-up scan to an adaptive scan pattern that reduces power consumption for specific images like Horizontal Stripes while maintaining simplicity in the control circuit design
Solution Approach 2:
The patent changes the parameter of scanning order from fixed to variable. By allowing the scanning sequence to be reconfigured based on image data, the system optimizes power consumption without significantly increasing circuit complexity. The control circuit can modify scan parameters dynamically to match different display requirements
2Device complexity
If fixed scanning order is used for all images, then the control circuit is simple, but power consumption cannot be optimized for special images
Solution Approach 1:
The system introduces dynamic adaptability to the scanning order based on image characteristics. For special images like Horizontal Stripes, the control circuit can switch to an optimized scanning sequence that reduces unnecessary transitions and lowers power consumption, while maintaining a simple overall circuit design that handles both fixed and variable scanning modes
3Use of energy by moving object
If scanning order is changed dynamically based on image data, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The patent implements dynamic scanning order adjustment with minimal increase in control circuit complexity. The gate driver control circuit incorporates mechanisms to detect image characteristics and automatically adjust scan sequences, achieving power optimization without requiring a completely complex redesign of the control architecture
Solution Approach 2:
The system optimizes power consumption by changing scan parameters dynamically while keeping the control circuit relatively simple. The patent demonstrates that parameter adjustment in the scanning order can be achieved through moderate circuit modifications rather than complete redesign, balancing power efficiency with circuit complexity
Data Source
AI summary
The present application discloses a gate driver control circuit including an encoder configured to encode instruction information to obtain a coded instruction and to transmit the coded instruction. The gate driver control circuit further includes a decoder coupled to the encoder and configured to decode the coded instruction to obtain the instruction information. Additionally, the gate driver circuit includes at least one multiplexer coupled to the decoder. Each multiplexer is configured to receive a first set of multiple timing-control signals and the instruction information, to adjust the first set of multiple timing-control signals to a second set of multiple timing-control signals based on the instruction information, and to output the second set of multiple timing-control signals. The gate driver control circuit further includes at least one gate-array sub-circuit. Each gate-array circuit is configured to output multiple row-scanning signals in response to the second set of multiple timing-control signals.