Gate Driver Temperature Sensing With EMI-Resistant PWM Sampling
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Solution Overview
Problem
Existing temperature sensing mechanisms in high-power transistor systems face challenges due to strong electromagnetic interference (EMI) during high-speed switching, leading to current and voltage spikes that cause sampling errors, and require additional circuitry and signal propagation delays, increasing system cost and complexity.
Innovation Solution
A gate driver system dynamically generates a Start of Conversion (SOC) signal by measuring the turn-on time of PWM signals to identify a low-EMI noise point, using an ADC circuit to translate voltage differences from a temperature-sensitive device into digital signals, which are then synchronized with PWM pulses, reducing the need for extra circuitry and improving accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If temperature sensing is performed during high-speed switching, then temperature monitoring capability is improved, but electromagnetic interference causes sampling errors and reduces measurement precision
Solution Approach 1:
The duty cycle measurement circuit measures the turn-on time of the PWM signal in advance to determine the optimal sampling moment. This preliminary measurement allows the system to select a sampling instant that avoids high-EMI periods during switching transitions, thereby maintaining both monitoring capability and measurement precision
Solution Approach 2:
The system uses feedback from the duty cycle measurement to dynamically adjust the ADC sampling timing. By continuously monitoring the PWM turn-on time and using this information to trigger sampling at optimal moments, the system adapts to varying switching conditions while avoiding EMI-contaminated measurement periods
2Measurement precision
If additional circuitry is added to generate SOC signals and reduce EMI interference, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The duty cycle measurement circuit serves multiple functions: it measures the PWM turn-on time for determining optimal sampling moments, and simultaneously provides timing synchronization for the ADC. This multi-functionality eliminates the need for separate SOC signal generation circuitry, reducing overall device complexity while maintaining measurement precision
Solution Approach 2:
The patent combines the SOC signal generation function with the existing duty cycle measurement circuit. By merging these functions into a single integrated circuit rather than adding separate components, the system reduces device complexity while achieving EMI-resistant sampling
3Productivity
If signal propagation delays are reduced by simplifying circuitry, then productivity is improved, but measurement precision may deteriorate without proper SOC signaling
Solution Approach 1:
The duty cycle measurement is performed in advance to pre-determine the optimal sampling instant. This preliminary action allows the ADC to be triggered at the correct moment without requiring complex delay compensation circuits, thereby maintaining both fast response and high measurement precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively monitors transistor temperatures with reduced sampling errors and system complexity, enhancing accuracy and reliability while minimizing EMI interference and eliminating the need for additional circuitry to generate SOC signals.
Implementation Method 1
an ADC circuit to translate voltage differences from a temperature-sensitive device into digital signals
Data Source
AI summary
A system comprises a gate driver that is configured to couple to a transistor disposed in a transistor module via a first pin. The gate driver comprises a duty cycle measurement circuit having a first input terminal and a first output terminal, the first input terminal coupled to a second pin via an isolator. The duty cycle measurement circuit comprises a flip-flop, a counter, a shift register, and a comparator. The system comprises an analog to digital converter circuit having a second input terminal, a second output terminal, and a reference terminal, the second input terminal coupled to a third pin configured to couple to a temperature-sensitive device disposed in the transistor module, the second output terminal coupled to a fourth pin via the isolator, and the reference terminal coupled to the first output terminal.