Gate Driver Multifunction Pin for Fault Reset and Self-Test

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Solution Overview

Problem

Existing gate drivers for high-power switching devices lack efficient mechanisms for monitoring and reporting fault conditions, such as overcurrent, which can lead to device damage and safety concerns, and require complex communication protocols with microcontrollers.

Innovation Solution

A gate driver with a multifunction pin that enables disabling outputs, activates fault tests, and resets fault conditions, simplifying communication by combining enable, reset, and fault check signals into a single pin, and includes a fault detector circuit to sense desaturation or current sense signals for fault detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple separate pins are used for enable, reset, and fault check functions, then each function can be independently controlled, but the device complexity and communication protocol complexity increase

Engineering Contradiction:
Improvefunctional control capabilityVSAvoidpin configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a multifunction pin that can operate in different modes (enable mode, reset mode, fault test mode) based on the type of signal received. This single pin replaces what would traditionally require multiple separate pins, reducing device complexity while maintaining full functional control capability through signal-type differentiation

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If complex communication protocols are used for fault monitoring, then comprehensive fault detection is achieved, but the communication complexity with microcontrollers increases

Engineering Contradiction:
Improvefault monitoring capabilityVSAvoidcommunication protocol complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate driver performs self-diagnostics by activating internal fault test circuits through the multifunction pin. The system monitors its own fault conditions and generates appropriate fault signals without requiring complex external testing protocols, thereby maintaining comprehensive fault detection while simplifying communication with the microcontroller

Inventive Principle:
Principle #25Self-service

3Reliability

If fault detection capabilities are integrated into the gate driver, then real-time monitoring is achieved, but the device complexity increases

Engineering Contradiction:
Improvefault detection capabilityVSAvoidcircuit integration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the fault detection circuit, fault signal generation, and multifunction pin control logic into an integrated gate driver device. This merging of functions achieves real-time fault monitoring while managing complexity through integration rather than separate discrete components, reducing overall system complexity

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12095451B2Gate driver
Publication Date: 2024.09.17 SEMICON COMPONENTS IND LLC
  • US12095451B2 patent drawing
  • US12095451B2 patent drawing
  • US12095451B2 patent drawing

AI summary

A gate driver to control a high-power switching device is disclosed. The gate driver includes a multifunction pin that allows the gate driver to be controlled by a multifunction signal to perform a number of different functions. For example, a level of the multifunction signal at the multifunction pin can enable/disable the output of the gate driver. In another example, a level of the multifunction signal that is held for a period while the gate driver is in a fault state can reset the state of the gate driver. In another example, pulsing the multifunction signal a number of times can activate a test of the fault detection capabilities of the gate driver. Utilizing one pin for this control, simplifies circuit complexity for communication between a controller and the gate driver, thereby reducing cost and increasing reliability.