Gate Driver Circuit for Flexible Progressive Scan Control
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Solution Overview
Problem
Existing gate driver circuits for display devices face challenges in efficiently outputting gate signals to any line during a progressive scan process, particularly due to the limitations of clock timing and the need for a narrow bezel, which restricts the implementation of methods other than progressive scan for vertical active time.
Innovation Solution
A gate driver circuit that includes an edge trigger circuit and line control signals to independently control the phase and timing of gate signals, allowing for flexible output to any line during progressive scan, and includes a method to sense electrical characteristics of subpixels during the scan process, enabling real-time adjustments and compensation for luminance differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional gate driver circuit uses fixed clock timing for progressive scan, then the circuit structure is simple, but the ability to output gate signals to any line flexibly is limited
Solution Approach 1:
The patent applies dynamics by making the gate driver circuit adjustable and adaptable rather than fixed. The circuit can dynamically change its operation mode between progressive scan and other scan methods (such as interlaced scan) by controlling the phase and timing of gate signals through line control signals, enabling flexible output to any line while maintaining a relatively simple circuit structure.
2Area of stationary object
If the gate driver circuit is directly formed on the same substrate as pixel circuits to reduce bezel size, then the bezel area is reduced, but the circuit complexity increases
Solution Approach 1:
The patent applies universality by designing a gate driver circuit that can perform multiple functions: it can operate in progressive scan mode for normal display, switch to other scan modes for specific lines (such as sensing lines), and provide both scanning and sensing functions. This multi-functionality allows the circuit to be more capable without requiring separate dedicated circuits, thus reducing bezel area while controlling complexity.
3Adaptability or versatility
If the gate driver circuit uses independent phase and timing control for gate signals, then the flexibility to output to any line is improved, but the control complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-defining control modes and signal patterns for different operation scenarios. The gate driver circuit is designed with predetermined control schemes for progressive scan, interlaced scan, and sensing operations, so that when a specific mode is selected, the corresponding pre-established control logic is activated. This reduces the need for complex real-time control decisions while maintaining flexibility.
Data Source
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AI summary
A gate driver circuit and a display device using the same are disclosed. The gate driver circuit includes a first transistor supplying a start signal to a Q node in response to a clock, a second transistor adjusting a gate voltage of the first transistor in response to the clock, a third transistor adjusting a gate voltage of the second transistor in response to the start signal, a fourth transistor changing a voltage of a QB node, a fifth transistor switching a current path between the first transistor and the Q node in response to a first line control signal, a sixth transistor supplying a gate-off voltage to an output node, a seventh transistor supplying a gate-on voltage to the output node, and an eighth transistor supplying a second line control signal to the QB node.