Gate Driver Integration for Narrow Bezel Displays
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Solution Overview
Problem
Existing display apparatuses face challenges in achieving a narrow bezel design due to the need for a separate area to accommodate the gate driver, which complicates the integration of the gate driver on the display panel and affects the display's image quality.
Innovation Solution
A gate driver is designed with a plurality of stages connected to each other and adjacent to the gate lines, featuring a boosting line that increases electric potential in response to carry signals, allowing for efficient output of gate signals and carry signals, and is integrated onto the display area, enabling a narrow bezel and normal image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate driver is disposed on the non-display area (bezel area), then the gate driver can be easily integrated, but the bezel area becomes larger
Solution Approach 1:
The gate driver is merged with the display area by disposing it on the non-display area of the display panel, integrating the driver circuit directly onto the panel substrate rather than using a separate module. This combining approach eliminates the need for additional external driver components while maintaining ease of integration.
Solution Approach 2:
The gate driver circuit is arranged in a multi-dimensional layout on the display panel substrate, utilizing the non-display area space efficiently. The circuit stages are disposed in a compact configuration that optimizes space utilization, allowing the driver to be integrated without significantly increasing the overall bezel area.
2Area of stationary object
If the gate driver is disposed on the display area, then the bezel area becomes smaller, but the image display may be affected
Solution Approach 1:
The gate driver circuit is positioned specifically in the non-display area of the display panel, utilizing the space that would otherwise be unused. This localized placement ensures that the driver circuit does not interfere with the active display region where image quality is critical, while still achieving compact integration.
Solution Approach 2:
The gate lines serve as intermediaries that connect the gate driver circuit in the non-display area to the pixel electrodes in the display area. This intermediary connection allows the driver to be positioned away from the active display region while maintaining proper signal transmission and image quality.
3Device complexity
If the boosting line is disposed adjacent to the gate line connected to the next stage, then the circuit layout is optimized, but interference between lines may occur
Solution Approach 1:
The gate driver circuit is divided into multiple independent stages, with each stage having its own boosting line and carry signal line. This segmentation allows for better spatial organization and reduces interference between adjacent lines by separating the functional blocks of different stages.
Solution Approach 2:
The gate driver operates in periodic cycles, with each stage sequentially activating its boosting line and carry signal transmission. This periodic operation reduces simultaneous signal activity on adjacent lines, minimizing interference while maintaining optimized circuit layout.
Data Source
AI summary
Each stage of a gate driver includes a controlling part which increases an electric potential of a boosting line in response to a carry signal of a previous stage and decreases the electric potential of the boosting line in response to the carry signal of a next stage, a first output part which turns on in response to the increased electric potential of the boosting line and receiving a clock signal to output a gate signal of a present stage, and a second output part which turns on in response to the increased electric potential of the boosting line and receiving the clock signal to output the carry signal of the present stage. The boosting line of the present stage is disposed adjacent to a gate line which is connected to one of next stages following the present stage.