Gate Driver IC Leakage Suppression via Second Gate
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Solution Overview
Problem
High-voltage gate driver integrated circuits face challenges in achieving high withstand voltage performance and minimizing leakage current, which are essential for improved performance in applications like electronic ballasts and motor drivers.
Innovation Solution
The design incorporates a substrate with a drift region, ring-shaped isolation region, field effect transistor, well regions, and gate structures, including a second gate structure that applies a reversed turn-on voltage to parasitic PN junctions to suppress leakage current and enhance anti-breakdown performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the gate driver integrated circuit is designed for high-voltage operation, then the withstand voltage performance is improved, but the leakage current increases
Solution Approach 1:
The gate driver integrated circuit is divided into distinct high-voltage and low-voltage regions separated by isolation structures. The substrate is segmented into different functional zones with appropriate doping types, allowing high-voltage components to operate independently from low-voltage control circuits, thereby maintaining high withstand voltage performance while controlling leakage current through spatial separation.
Solution Approach 2:
Different regions of the substrate are doped with different doping types (first doping type for high-voltage regions, second doping type for low-voltage regions) to create locally optimized electrical characteristics. This local quality differentiation allows each region to be optimized for its specific function, enabling high-voltage operation in appropriate areas while minimizing leakage in other areas.
2Strength
If the isolation region depth is increased to improve voltage withstand performance, then the breakdown voltage increases, but the manufacturing complexity increases
Solution Approach 1:
The patent optimizes the depth parameter of the isolation region to achieve the required breakdown voltage while considering manufacturing constraints. By carefully selecting and adjusting the isolation region depth parameter, the design achieves adequate voltage withstand performance without excessive manufacturing complexity, balancing performance requirements with fabrication feasibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively increases the area of depletion layers to withstand high voltages, reducing leakage current and improving the overall high-voltage withstand performance of the gate driver integrated circuit.
Implementation Method 1
the second gate structure is configured to apply a reversed turn-on voltage to parasitic PN junctions... effectively increases the area of depletion layers to withstand high voltages, reducing leakage current
Data Source
AI summary
A gate driver integrated circuit is provided. The gate driver integrated circuit includes a first well region disposed at one side of a first gate structure near an isolation region, and a second gate structure between the first well region and the isolation region. The second gate structure is used to suppress a leakage current in a parasitic PN junction formed by a drift region between the first well region and the isolation region. A performance of the gate driver integrated circuit is improved.