Gate Driver Circuit Level Conversion for Transistor Threshold Drift
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Solution Overview
Problem
In the GOA architecture of liquid crystal display panels, thin film transistors experience threshold voltage drift due to long-term high-voltage states, leading to electricity leakage and inadequate switching, which affects display quality and output accuracy.
Innovation Solution
A gate driver circuit with a scan signal generation circuit and level conversion circuits that reduce the working voltage of transistors to a logic voltage, such as 3.3 V, and synchronize signal phases through level conversion, ensuring stable transistor operation and improved display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistors operate in high-voltage states to drive gate lines, then driving capability is improved, but threshold voltage drift occurs leading to electricity leakage and inadequate switching
Solution Approach 1:
The patent segments the voltage control function into two parts: a level conversion circuit that generates high-voltage drive signals from low-voltage logic signals, and a scan signal generation circuit that operates at low voltage (3.3V). This segmentation allows the transistor to operate at low voltage for stability while still providing high-voltage drive capability when needed, resolving the contradiction between driving capability and threshold voltage stability.
2Power
If transistors operate at high voltage to meet driving requirements, then output power is improved, but transistor lifespan is reduced due to threshold drift
Solution Approach 1:
The patent implements dynamic voltage conversion where the level conversion circuit dynamically generates high-voltage signals only when needed for gate line driving, while the transistor operates at low voltage during signal processing. This dynamic approach allows the system to achieve high output power when required while minimizing the duration of high-voltage stress on the transistor, thereby extending its lifespan.
3Power
If transistors operate at high voltage to drive gate lines, then signal strength is improved, but power consumption increases
Solution Approach 1:
The level conversion circuit operates periodically to convert low-voltage logic signals to high-voltage drive signals only when gate line driving is required. The transistor remains at low voltage operation during non-driving periods. This periodic high-voltage action provides strong drive signals when needed while minimizing overall power consumption during signal processing operations.
Data Source
AI summary
A gate driver circuit, a display device and a driving method. The gate driver circuit includes: a scan signal generation circuit, wherein the scan signal generation circuit includes N1 stages of first output terminals, and the scan signal generation circuit is configured to output N1 first pulse scan signals stage by stage respectively through the N1 stages of first output terminals; and N2 level conversion circuits, wherein the N2 level conversion circuits are configured to output under a control of a plurality of conversion control signals N1 second pulse scan signals which are in one-to-one correspondence with the N1 first pulse scan signals, and the plurality of conversion control signals include a plurality of first sub-control signals which are the N1 first pulse scan signals, wherein N1 is an integer greater than or equal to 2, and N2 is an integer greater than or equal to 2.