Gate Driver Overcurrent Protection via Clock Signal Shutdown

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Solution Overview

Problem

Gate driver circuits in liquid crystal display (LCD) devices are vulnerable to overcurrent conditions, which can lead to damage and affect the overall performance and reliability of the display apparatus.

Innovation Solution

A method is implemented to protect the gate driver circuit by generating a clock signal, sensing the output current, determining if it is in an overcurrent condition based on predefined factors, and generating a shutdown signal to block the clock signal when an overcurrent is detected, thereby preventing damage from excessive current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the gate driver circuit operates continuously to drive the display panel, then the productivity and functionality of the display apparatus is maintained, but the circuit becomes vulnerable to overcurrent damage reducing reliability

Engineering Contradiction:
Improvegate driver circuit reliabilityVSAvoiddisplay apparatus operation continuity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by detecting overcurrent conditions before they cause permanent damage to the gate driver circuit. The overcurrent detection unit continuously monitors current levels and generates shutdown signals in advance when threshold values are exceeded, preventing catastrophic failure while maintaining normal operation during safe conditions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback through the overcurrent detection unit that continuously monitors the operating current of the gate driver circuit and provides real-time information to the shutdown control unit. This closed-loop feedback system adjusts the operational state based on actual current conditions, shutting down when current exceeds safe thresholds and potentially resetting when conditions normalize

Inventive Principle:
Principle #23Feedback

2Reliability

If overcurrent protection mechanisms are added to the gate driver circuit, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvegate driver circuit protectionVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary overcurrent detection unit that acts as a mediator between the power supply and the gate driver circuit. This separate monitoring component detects overcurrent conditions and triggers shutdown signals without requiring complex modifications to the core driver circuit architecture, thereby adding protection while limiting complexity increase

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the overcurrent detection function as a separate, dedicated unit rather than integrating it deeply into the gate driver circuit itself. This modular approach isolates the protection mechanism, allowing it to be added or removed independently and simplifying the overall system architecture while maintaining reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9570027B2Method of protecting a gate driver circuit and display apparatus performing the method
Publication Date: 2017.02.14 SAMSUNG DISPLAY CO LTD
  • US9570027B2 patent drawing
  • US9570027B2 patent drawing
  • US9570027B2 patent drawing

AI summary

A method of method of protecting a gate driver circuit configured to provide a gate line of a display panel with a gate signal includes generating a clock signal to drive the gate driver circuit, sensing an output current of the clock signal, detecting an overcurrent of the clock signal based on an overcurrent determining factor, determining whether the clock signal is in an overcurrent condition based on a count number of the overcurrent, generating a shutdown signal when the clock signal is in the overcurrent condition and blocking the clock signal from being applied to the gate driver circuit based on the shutdown signal.