Gate Driver Circuit Integration in Display Panel Pixel Array
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Solution Overview
Problem
Conventional display panel technologies fail to successfully integrate the gate driver circuit within the display region, leading to a large border area and reduced display space.
Innovation Solution
The display panel design includes a pixel array with three gate lines, two data lines, and six sub-pixels, allowing the gate driver circuit to be disposed within the pixel array, thereby reducing the border area and increasing the display region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the gate driver circuit is disposed in the peripheral region, then the gate driver circuit can be easily integrated, but the border area occupies a large portion and the display area is reduced
Solution Approach 1:
The gate driver circuit is moved from the traditional peripheral region (one-dimensional border) into the display region (two-dimensional pixel array space). By utilizing the space within pixel units and rearranging the connection topology of gate lines and data lines, the circuit is embedded in a new spatial dimension that does not compromise display area.
Solution Approach 2:
The gate driver circuit is nested within the pixel array structure. Specific pixel units are configured to contain portions of the gate driver circuit, allowing the circuit to be embedded inside the display region without occupying additional border space. This nesting approach enables dual functionality of the same spatial region.
2Area of stationary object
If the gate driver circuit is moved into the display region, then the border area can be reduced and display area increased, but the pixel unit structure becomes more complex
Solution Approach 1:
The pixel array is segmented into specific pixel units that serve dual purposes: displaying images and housing gate driver circuit components. By dividing the circuit functionality across multiple pixel units and assigning specific roles to different sub-pixels within each unit, the complex circuit is distributed and managed through systematic segmentation.
Solution Approach 2:
Certain pixel units are designed with multi-functionality, where sub-pixels serve both as display elements and as components of the gate driver circuit. The same physical structures (gate lines, data lines, sub-pixels) perform dual roles: image display and circuit operation, thereby reducing overall system complexity despite the integration challenge.
3Device complexity
If conventional pixel unit configuration is used, then the structure is simple, but there is no extra space for gate driver circuit in the display region
Solution Approach 1:
Different pixel units within the array are assigned different functional qualities. Specific pixel units are configured with modified structures to house gate driver circuit components, while other pixel units maintain conventional simple structures for optimal display performance. This local differentiation allows circuit integration without compromising overall display area or forcing complexity into all pixel units.
Data Source
AI summary
A display panel including a display region and a non-display region, a plurality of gate lines, a plurality of data lines, a pixel array and a gate on array circuit. The non-display region is located at one side of the display region. The plurality of gate lines and the plurality of data lines are disposed in the display region. The pixel array is located in the display region, wherein the pixel array is composed of a plurality of pixel units that are repeatedly arranged. The pixel units consist of three gate lines, two data lines and six sub-pixels, and each sub-pixel is electrically connected to one of the gate lines and one of the data lines located in the pixel array respectively. The gate on array circuit is disposed in the pixel array.