Display Panel Gate Driver Overlap for Compact Pixel Circuit Layout
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Solution Overview
Problem
Existing display devices face challenges in optimizing the layout and connectivity of pixel circuit units and gate drivers to enhance display quality and efficiency.
Innovation Solution
A display device design that includes a substrate with specific arrangements of pixel circuit units and gate drivers, where the first pixel circuit unit and gate driver are spaced apart in a second direction crossing the first direction, with gate drivers aligned in a first direction and connected by a clock line, and overlapping with second pixel circuit units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate drivers are arranged in a line along the first direction and spaced apart from pixel circuit units in the second direction, then electrical connectivity and signal transmission are improved, but the overall device area increases
Solution Approach 1:
The patent transitions from a two-dimensional planar arrangement to a three-dimensional stacked configuration. Gate drivers and pixel circuit units are positioned at different vertical levels (different layers), allowing electrical connections while reducing the horizontal footprint. This vertical stacking enables signal transmission without increasing the device's planar area.
Solution Approach 2:
The patent implements a nested structure where gate drivers and pixel circuit units are integrated within the same device boundary at different hierarchical levels. The gate drivers are embedded in one layer while pixel circuit units are positioned in another layer, creating a compact nested arrangement that improves connectivity without expanding the overall device envelope.
2Area of stationary object
If gate drivers overlap with second pixel circuit units, then space utilization is improved, but manufacturing precision requirements increase
Solution Approach 1:
The overlapping arrangement is achieved by positioning gate drivers and pixel circuit units at different vertical levels rather than in the same plane. This three-dimensional separation allows their projections to overlap in the planar view while physically maintaining distinct positions, thereby improving space utilization without compromising manufacturing feasibility through precise vertical layering.
3Object-generated harmful factors
If first pixel circuit unit and gate driver are spaced apart in the second direction, then signal interference is reduced, but connection complexity increases
Solution Approach 1:
The spatial separation in the second direction combined with vertical layering creates effective isolation between the first pixel circuit unit and gate driver. This three-dimensional distancing reduces electromagnetic interference while the structured layering provides organized connection paths, managing complexity through systematic architectural design rather than ad-hoc routing.
Data Source
AI summary
A display device includes a substrate including a display area including a corner portion, a connection portion, and a central portion, and a peripheral area surrounding at least a portion of the display area in plan view, a first display element in the corner portion, a second display element in the connection portion, a first pixel circuit unit in the corner portion, and electrically connected to the first display element, a second pixel circuit unit in the connection portion, and electrically connected to the second display element, and gate drivers arranged in a line along a first direction, a gate driver of the gate drivers being in the connection portion, overlapping at least a portion of the second pixel circuit unit, and electrically connected to the first pixel circuit unit.