Gate Driver IC Power Supply Line Flexibility

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Solution Overview

Problem

The flexibility in designing the connection of power supply lines between conventional chip-on-film (COF) substrates and display panel substrates is low due to the limitations of single-layer wiring, which restricts the reduction of power supply lines and affects the versatility of the gate driver IC and COF substrate.

Innovation Solution

A gate driver IC with N shift registers and (N+k) power supply terminals, where N internal lines connect one-to-one with N shift registers, and k internal lines connect one-to-one with k additional power supply terminals, allowing for the sharing of power supply voltages between non-adjacent terminals, thereby increasing the flexibility in designing power supply lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a single-layer wiring structure is used on the COF substrate to reduce cost and simplify manufacturing, then manufacturing complexity is reduced, but the flexibility in designing power supply line connections is limited

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidpower supply line connection flexibility
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent introduces a second wiring layer above the first wiring layer on the COF substrate. This multi-layer structure allows power supply lines to be routed in three-dimensional space, enabling connections that were impossible in a single-layer configuration. The additional layer provides alternative routing paths and connection points, significantly increasing design flexibility for power supply connections while maintaining manufacturing feasibility through standard multi-layer PCB techniques.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If the number of power supply terminals is increased to (N+k) terminals to provide more connection options, then adaptability is improved, but device complexity increases

Engineering Contradiction:
Improvepower supply connection optionsVSAvoidnumber of power supply terminals
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple power supply terminals on the COF substrate with corresponding terminals on the display panel substrate through the multi-layer wiring structure. By merging the wiring paths across layers and substrates, the system achieves greater adaptability without proportionally increasing overall complexity. The additional k terminals are integrated into the existing N-terminal framework through shared wiring paths and connection points.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The additional k power supply terminals are designed to provide multiple functions: they can serve as alternative power supply paths, support different connection configurations, and enable flexibility in power distribution schemes. This multi-functionality allows the same terminal structure to adapt to various design requirements without requiring separate dedicated structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10403197B2Gate driver IC, chip-on-film substrate, and display apparatus
Publication Date: 2019.09.03 MAGNOLIA BLUE CORP
  • US10403197B2 patent drawing
  • US10403197B2 patent drawing
  • US10403197B2 patent drawing

AI summary

A gate driver IC includes: N shift registers which generate a gate signal to be supplied to a display panel substrate, N being a natural number; (N+k) power supply terminals (PA1 to PD1, Pa1, and Pc1) for power supply from outside, k being a natural number; and (N+k) internal lines connected to the (N+k) power supply terminals, wherein N internal lines among the (N+k) internal lines connect, one-to-one, N power supply terminals among the (N+k) power supply terminals and the N shift registers, and k internal lines other than the N internal lines among the (N+k) internal lines connect, one-to-one, k power supply terminals other than the N power supply terminals among the (N+k) power supply terminals and k internal lines selected from among the N internal lines.