Gate Driver Power Sequence Control Circuit Latch-Up Prevention
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Solution Overview
Problem
Conventional power sequence control circuits in gate drivers for liquid crystal displays fail to function normally when the second gate voltage is high, leading to latch-up phenomena and damage due to the high threshold voltages of high-voltage transistors, which prevents proper control over the power on/off sequence.
Innovation Solution
A gate driver with a power sequence control circuit that includes a series of P-type transistors, an N-type transistor, and a judging circuit with a comparator and voltage-dividing resistor strings, allowing for effective control of the second gate voltage and first gate voltage entering the gate driving main circuit, even when the second gate voltage is high.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If high-voltage transistors with high threshold voltages (VTH≈3V) are used in the power sequence control circuit, then the circuit can handle high first gate voltage (VGH), but the second gate voltage (VGL) cannot be properly controlled when it needs to be higher than -3V (e.g., -2V)
Solution Approach 1:
The power sequence control circuit is divided into two separate circuits: a first power sequence control circuit for controlling VGH entry, and a second power sequence control circuit for controlling VGL entry. Each circuit uses transistors optimized for its specific voltage range, with the second circuit using low-VTH transistors specifically designed for negative voltage control.
Solution Approach 2:
Different transistor types are used in different parts of the system: high-VTH transistors are used where high voltage protection is needed (first control circuit), while low-VTH transistors are used where precise negative voltage control is needed (second control circuit). This local optimization resolves the contradiction between voltage handling strength and control versatility.
2Reliability
If the second gate voltage (VGL) is supplied before the first gate voltage (VGH), then proper power sequencing is achieved, but transient current flows from VGH to VGL causing latch-up phenomenon
Solution Approach 1:
The judging circuit detects the voltage state of VGL in advance and only enables the VGH power supply path after confirming VGL is properly established. This preliminary detection prevents transient current flow by ensuring the correct power-on sequence: VGL first, then VGH.
Solution Approach 2:
The judging circuit continuously monitors the voltage state and provides feedback control signals to the transistors. When VGL reaches its target voltage, the judging circuit generates a signal to switch on the appropriate transistor, enabling VGH supply. This feedback mechanism ensures proper sequencing and prevents latch-up by only allowing VGH to be supplied when VGL is stable.
3Ease of operation
If the N-type transistor MN1 is used to control VGL entry, then power sequencing can be controlled, but when VGL is higher than -3V (e.g., -2V), the gate-source voltage (VGS) of MN1 becomes insufficient (2V < VTH=3V) to switch on the transistor
Solution Approach 1:
The invention changes the key parameter of transistor threshold voltage from high (VTH≈3V) to low (VTH<2V) specifically for the transistor controlling VGL. This parameter change enables reliable switching even when the voltage difference is only 2V, resolving the contradiction between operational ease and switching reliability.
Solution Approach 2:
A specialized low-VTH transistor is used specifically for controlling VGL entry, while other parts of the system continue to use standard high-VTH transistors. This localized optimization ensures reliable switching for negative voltage control without compromising overall system robustness.
Data Source
AI summary
A gate driver includes a gate driving main circuit and a power sequence control circuit. The gate driving main circuit disposed between an operating voltage and ground is coupled to a first gate voltage and a second gate voltage. The operating voltage is higher than ground and first gate voltage is higher than second gate voltage. The power sequence control circuit includes first-type transistors, a second-type transistor, a transistor and a judging circuit. The first-type transistors are coupled in series between first gate voltage and a first node and their gates are coupled to a second node. The second-type transistor is coupled between first node and second gate voltage and its gate is coupled to second node. The transistor is coupled between first gate voltage and gate driving main circuit and its gate is coupled to first node. The judging circuit generates an output signal to second node.