Gate Driver Pre-Charge Pulse Control for LCD Ghost Defects
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Solution Overview
Problem
In liquid crystal display (LCD) apparatuses, the pre-charge driving mode can lead to overcharging of pixels, resulting in ghost defects due to excessive pre-charging, which causes undesired luminance and grayscale issues.
Innovation Solution
A gate driver system comprising shift-registers, inverters, and AND-circuits that generate pre-charge and main-charge pulses synchronized with gate clock signals, and a timing controller that compares image data to determine pre-charge control signals, adjusting the pre-charge pulses to prevent overcharging and eliminate ghost defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pre-charge driving mode is used to increase charging rate of pixel, then charging speed is improved, but pixel may be overcharged causing ghost defects
Solution Approach 1:
The gate driver dynamically adjusts the pre-charge pulse width based on the grayscale value of the previous frame. For low grayscale values, the pre-charge pulse is shortened or eliminated to prevent overcharging; for high grayscale values, the pre-charge pulse is extended to ensure sufficient charging. This dynamic adjustment resolves the contradiction by adapting the pre-charge duration to actual display needs.
Solution Approach 2:
The invention changes the parameter of pre-charge pulse width according to the grayscale value. By varying this parameter based on content requirements, the system achieves both fast charging when needed and prevents overcharging when grayscale is low, thus resolving the contradiction between charging speed and ghost defect prevention.
2Manufacturing precision
If pre-charge pulse is extended to ensure sufficient charging, then charging completeness is improved, but pixel luminance becomes higher than desired grayscale
Solution Approach 1:
The gate driver adjusts the pre-charge pulse width parameter based on the grayscale value from the previous frame. When grayscale is low, the pre-charge pulse is shortened to prevent excessive luminance; when grayscale is high, the pulse is extended to ensure complete charging. This parameter adaptation resolves the contradiction between charging completeness and luminance accuracy.
Solution Approach 2:
The system uses feedback from the previous frame's grayscale data to control the current frame's pre-charge pulse duration. This feedback mechanism ensures that the pre-charge operation is optimized based on actual display requirements, preventing both undercharging and overcharging conditions.
3Stability of the object's composition
If pre-charge driving is applied to all pixels, then charging uniformity is improved, but ghost defects occur in regions where pre-charge is not needed
Solution Approach 1:
The gate driver applies pre-charge operation selectively to different pixel regions based on their grayscale requirements. Instead of uniform pre-charge across all pixels, the system adjusts pre-charge pulse width locally according to the specific grayscale value of each region, preventing ghost defects in areas where pre-charge is unnecessary while maintaining charging uniformity where needed.
Solution Approach 2:
The pre-charge pulse width parameter is changed according to spatial location and grayscale value. This localized parameter adjustment ensures that pre-charge is applied uniformly only where necessary, eliminating ghost defects in regions where pre-charge would be harmful while maintaining charging consistency where it benefits display quality.
Data Source
AI summary
A gate driver includes a first shift-register including a plurality of odd-numbered stages which outputs a plurality of odd-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a first gate clock signal, a second shift-register comprising a plurality of even-numbered stages which outputs a plurality of even-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a second gate clock signal, a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal, and a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal.