Gate Driver Pulse Timing for Display Brightness Stability
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Solution Overview
Problem
Display devices experience screen defects due to asynchronous image frames from video cards and existing solutions like V-Sync and G-Sync either fix screen defects but introduce display lag or fail to address brightness issues caused by capacitance changes in pixels due to orientation polarization effects.
Innovation Solution
A display device with a gate driver and timing controller that outputs gate signals based on an initial pulse signal with a high level for a period longer than half a frame period, adjusting clock signal frequencies to stabilize liquid crystals and reduce capacitance-related brightness decreases, using a polymer stabilized alignment (PSA) mode liquid crystal array with a color filter on array (COA) pixel architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If V-Sync function is used to solve screen defects, then screen defects are resolved, but display lag is introduced
Solution Approach 1:
The patent implements dynamic scan frequency adjustment by allowing the display device to change scan frequencies adaptively based on incoming image frame rates. The timing controller dynamically adjusts the scan frequency to match the video card's output rate, eliminating the need for fixed V-Sync locking while preventing screen defects through frequency synchronization.
Solution Approach 2:
The patent changes the scan frequency parameter dynamically rather than maintaining a fixed frequency. By adjusting the scan frequency to match the video card's output frame rate, the system resolves screen defects without introducing display lag, as the display adapts its timing parameters to the content being displayed.
2Use of energy by moving object
If scan frequency is reduced from first frequency to second frequency, then brightness decrease is caused due to capacitance changes, but lower frequency reduces power consumption
Solution Approach 1:
The patent applies a preliminary high-level initial pulse signal to the gate line before the normal scanning process when scan frequency changes. This preliminary action ensures that liquid crystal molecules have sufficient time to reach their stable alignment state before image display begins, preventing brightness decreases caused by incomplete liquid crystal response at lower scan frequencies.
Solution Approach 2:
The patent counteracts the potential brightness decrease caused by reduced scan frequency by applying an extended initial pulse signal. This preliminary anti-action compensates for the slower liquid crystal response at lower frequencies, ensuring that brightness remains stable even when operating at energy-efficient lower scan rates.
3Illumination intensity
If initial pulse signal width is increased to stabilize liquid crystals, then brightness stability is improved, but frame period is extended
Solution Approach 1:
The patent dynamically adjusts the initial pulse signal width based on the scan frequency being used. When operating at lower scan frequencies where liquid crystal stabilization is more critical, the initial pulse is extended. When operating at higher frequencies, the initial pulse duration is reduced. This dynamic adjustment maintains brightness stability while minimizing the impact on frame period.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively mitigates brightness decreases by allowing liquid crystals to reach a stable state, reducing the impact of orientation polarization on pixel capacitance and maintaining display brightness when scan frequencies change.
Implementation Method 1
the impact of orientation polarization on pixel capacitance
Data Source
AI summary
A display device includes a plurality of pixels, a plurality of gate lines, a timing controller, and a gate driver. The gate lines are electrically coupled to the pixels. The timing controller provides an initial pulse signal. The gate driver is electrically coupled to the timing controller and the gate lines and receives the initial pulse signal. The gate driver receives the initial pulse signal with a high level and outputs a plurality of gate signals to the gate lines during a period which is longer than half of a frame of the display device, in response to a scan frequency of the display device changing from a first frequency to a second frequency, where the first frequency is higher than the second frequency.