Display Panel Gate Driver QB-Node Control for Accurate Scan Signals
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Solution Overview
Problem
Existing display technologies face challenges in accurately transmitting scan signals to sub-pixels due to the turn-on and turn-off times of pull-down transistors being mismatched, leading to inefficiencies and potential bezel enlargement in display panels.
Innovation Solution
A gate driver with a QB-node control unit that includes transistors and capacitors to accurately control the turn-on and turn-off voltages of pull-down transistors, ensuring precise signal transmission and reducing bezel size by integrating the gate driver directly into the display panel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If the gate driver is embedded directly in the display panel (GIP circuit), then the bezel size is reduced, but the signal transmission accuracy deteriorates due to mismatched turn-on and turn-off times of pull-down transistors
Solution Approach 1:
The gate driver circuit is divided into multiple stages, with each stage independently controlling a group of gate lines. This segmentation allows for optimized transistor sizing and timing control in each stage, improving signal transmission accuracy while maintaining the embedded GIP configuration that reduces bezel size.
Solution Approach 2:
Different transistor sizes are used in different parts of the circuit - specifically, the pull-down transistor is designed with larger width and length parameters (W2, L2) compared to other transistors to compensate for its longer turn-on time. This local quality adjustment ensures accurate signal transmission in the embedded gate driver configuration.
2Manufacturing precision
If the pull-down transistor is designed with larger dimensions to improve turn-on time, then the signal transmission accuracy is improved, but the device complexity and area increase
Solution Approach 1:
The transistor dimensions are optimized by changing the width and length parameters - the pull-down transistor uses larger W2 and L2 values compared to other transistors in the circuit. This parameter adjustment improves turn-on time and signal accuracy without requiring fundamental changes to the circuit topology or adding complex control mechanisms.
Data Source
AI summary
A display panel includes pixels connected to gate lines, and a gate driver that supplies a gate signal to at least one of the gate lines and includes a plurality of stages. Each stage includes a pull-up transistor to apply a turn-on voltage of a first clock signal to an output terminal responsive to a voltage at a Q-node, a pull-down transistor to apply a turn-off voltage to the output terminal responsive to a voltage at a QB-node that holds the turn-on voltage during a period in which the output terminal is applied the turn-off voltage, and a QB-node control unit to apply the turn-on voltage to the QB-node responsive to the first clock signal and a second clock signal in reverse-phase with the first clock signal. Accordingly, a display panel may include a gate driver that can set, reset, and hold the voltage at a QB-node.