Gate Driver Q-Node Potential Holding for Low-Speed Display Stability
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Solution Overview
Problem
In display devices, the voltage of the Q node in the gate shift register of a gate driver circuit rises during low-speed operations, leading to leakage and noise, causing image quality defects.
Innovation Solution
A gate driver circuit with potential maintaining means connected to the Q node, maintaining the voltage at a predefined level to prevent voltage rise and image defects, utilizing the potential maintaining means to supply additional charges and stabilize the Q node voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If the display panel operates at low-speed for a long time, then the operation duration is extended, but the voltage of the Q node rises causing leakage and noise
Solution Approach 1:
The patent applies preliminary action by introducing a potential maintaining means that proactively maintains the Q node voltage at a predetermined level before voltage rise can occur. This is achieved through a discharge transistor that continuously discharges the Q node to prevent voltage accumulation, and a potential maintaining capacitor that provides a reference potential, ensuring voltage stability is maintained in advance during low-speed operations
Solution Approach 2:
The patent implements feedback through the potential maintaining means that continuously monitors and adjusts the Q node voltage. The discharge transistor responds to voltage changes at the Q node by adjusting its discharge current, creating a negative feedback loop that maintains voltage at the predetermined level, preventing the voltage rise that would otherwise occur during extended low-speed operation
2Reliability
If the Q node voltage is maintained at a predetermined level, then leakage and noise are prevented, but additional circuit components are required
Solution Approach 1:
The patent merges the potential maintaining function with the existing shift register circuitry. The potential maintaining means is integrated into the Q node structure of the shift register, combining the voltage maintenance function with the data storage function of the Q node. This integration approach adds functionality while minimizing the increase in overall circuit complexity
Solution Approach 2:
The potential maintaining means serves multiple functions: it maintains the Q node voltage at a predetermined level, provides a reference potential for the output transistor, and prevents both leakage and noise simultaneously. The discharge transistor and potential maintaining capacitor work together to achieve multiple objectives with a single integrated mechanism, improving the efficiency of the circuit design
Data Source
AI summary
The disclosure relates to a display panel, a display device, and a gate driver circuit. According to an embodiment, a display panel includes a gate driver circuit in which when a display device operates at low-speed for a long time, a voltage of a Q node between an input and an output of a gate shift register in a gate driver circuit does not rise but is maintained at a value below a certain voltage. Here, potential maintaining circuit (PMC) is connected to a Q node, a Q2 node, or a vulnerable node between an input unit and an output unit of the gate shift register. The PMC maintains a potential of the Q node at a value below a selected level during a light-emitting operation for display. Thus, image quality defect due to damage to output voltage resulting from leakage and noise at an output node is prevented.