Gate Driver Power-On Reset Circuit for 0V Reset Initialization
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Solution Overview
Problem
Conventional power on reset circuits in display apparatus gate drivers fail to properly reset the signal to 0 volts when the power is turned off, leading to incorrect initial states and operational abnormalities, especially when transistors with high threshold voltages are used, affecting the entire operation performance.
Innovation Solution
A power on reset circuit design that includes a first and second transistor, a resistor, and a buffer circuit, where the second transistor has a higher threshold voltage than the first, and a buffer circuit with multiple inverter and transistor modules, ensuring the reset signal is properly reset to 0 volts even when power is abnormally turned on or off.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors with high threshold voltage are used in the power on reset circuit, then the transistor switching performance is improved, but the reset signal may fail to decrease to 0 volt when power is turned off, causing reset function failure
Solution Approach 1:
The patent changes the electrical parameters of the transistor by connecting its source electrode to a reference voltage (such as ground) rather than directly to the input signal voltage. This creates a body effect that increases the threshold voltage of the transistor, ensuring it remains in the cutoff state when the input signal decreases to low voltage levels (e.g., 0.5V), thereby guaranteeing the reset signal properly resets to 0V.
2Loss of energy
If the operating voltage is only decreased to 0.5 volts instead of 0 volt when power is turned off, then the power consumption is reduced, but the reset signal may be maintained at 0.5 volts instead of decreasing to 0 volt, causing reset failure
Solution Approach 1:
The patent modifies the transistor's operating parameters by applying a body bias voltage (reference voltage) to the source electrode. This creates a threshold voltage shift that ensures the transistor remains off even when the input signal is at 0.5V, forcing the reset signal to properly reach 0V and ensuring complete reset functionality while allowing the operating voltage to be reduced to 0.5V for lower power consumption.
3Reliability
If the reset signal is not properly initialized to 0 volt, then the circuit operation may be abnormal, but adding more complex circuit components to ensure proper reset may increase the device complexity
Solution Approach 1:
The patent makes the transistor self-regulating by connecting its source electrode to a reference voltage node. The transistor automatically adjusts its threshold voltage through the body effect based on the voltage conditions, ensuring proper reset functionality without requiring additional control circuits or complex components. The circuit uses its own internal voltage nodes to control the transistor behavior.
Data Source
AI summary
A power on reset circuit applied to a gate driver of a display apparatus is disclosed. The power on reset circuit is coupled between an operating voltage and a ground terminal. The power on reset circuit includes an output terminal, a first transistor, a second transistor, a resistor, and a buffer circuit. The first transistor is coupled between the operating voltage and a first node. A gate of first transistor is coupled to the first node. The second transistor is coupled between the operating voltage and the first node. A gate of second transistor is coupled to the ground terminal. The resistor is coupled between the first node and ground terminal. The buffer circuit is coupled between the first node and output terminal and outputs a reset signal through the output terminal. A second threshold voltage of second transistor is larger than a first threshold voltage of first transistor.