Gate Driver Shift Register Leakage Current Reduction
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Solution Overview
Problem
Liquid crystal display (LCD) panels using amorphous silicon (a-Si) thin-film transistors face challenges in integrating circuits due to low mobility, leading to reliability issues and leakage currents, particularly in gate driver circuits where high mobility and low threshold voltage result in circuit performance deterioration.
Innovation Solution
A display driving circuit design that incorporates a gate driver with shifter register stages, including an input portion, an inverter portion, and a pull-up/pull-down portion, where the inverter portion outputs a signal with a lower level than the low-level signal for a predetermined time, reducing leakage current by maintaining a negative gate-source voltage in the pull-down function portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gate driver circuit is integrated in an LCD panel to overcome low mobility, then circuit integration is improved, but leakage current increases and reliability deteriorates
Solution Approach 1:
The gate driver circuit is divided into multiple shift register stages (first shift register stage, second shift register stage, etc.), with each stage independently controlling a segment of gate lines. This segmentation allows for better control of leakage current in each stage while maintaining overall circuit integration.
Solution Approach 2:
The invention changes the voltage parameters by introducing a negative voltage level (VNL) in addition to the conventional high (VGH) and low (VGL) voltage levels. The pull-down portion applies VNL to the gate electrode during the off-state, creating a negative gate-source voltage that actively suppresses leakage current through the TFT channel.
2Speed
If high mobility and low threshold voltage are used in gate driver circuits, then switching speed is improved, but leakage current increases and circuit performance deteriorates
Solution Approach 1:
The pull-down portion applies a negative voltage (VNL) to the gate electrode before and during the off-state period, creating a preliminary anti-action that prevents leakage current from occurring in the first place. This negative bias counteracts the inherent leakage tendency of high-mobility TFTs with low threshold voltage.
3Reliability
If the inverter portion outputs a signal with lower level than low-level signal, then leakage current is reduced, but voltage level range is constrained
Solution Approach 1:
The invention introduces a fourth voltage level (VNL, negative voltage) in addition to the conventional three levels (VGH, VGL, and 0V), expanding the voltage parameter set. This allows the inverter portion to output signals at VNL during pull-down operations, effectively reducing leakage current while maintaining adaptability through the extended voltage range.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and output characteristics of the display driving circuit by reducing leakage current and maintaining stable gate output waveforms even under conditions of high temperature or low threshold voltage, thereby improving circuit performance.
Implementation Method 1
a gate driver circuit integrated in an LCD panel increases the width of a TFT and forms a shift register circuit using a bootstrap effect
Data Source
AI summary
A display driving circuit is provided. The display driving circuit, in which a gate driver shifting and outputting an input signal is embedded, includes an input portion receiving a pulse input signal consisting of a high-level signal and a low-level signal and transferring the pulse input signal to a boosting node, an inverter portion connected with the input portion, and inverting the pulse input signal to output the inverted signal, and a pull-up/pull-down portion consisting of a pull-up portion connected to the input portion, receiving a boosting voltage from the boosting node, and outputting a pull-up output signal, and a pull-down portion connected to the inverter portion, receiving the inverted signal, and outputting a pull-down output signal. Here, the inverter portion outputs a signal having a lower level than the low-level signal for a predetermined time period in which the pull-up output signal is output. Accordingly, the display driving circuit exhibits excellent output characteristics due to improved performance and also has excellent reliability.