Gate Driver Signal Line Reduction for Display Miniaturization
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Solution Overview
Problem
Existing flat panel display devices face challenges in reducing the number of signal lines on the display panel, which increases the bezel area and connection pins, making it difficult to miniaturize the display device.
Innovation Solution
The implementation of a gate driver with separated shift registers for odd and even-numbered gate lines, where a control portion selectively delays and derives control signals to drive both shift registers using only one set of control signals, reducing the number of signal lines and control signals needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple control signals are applied to separate shift registers for odd and even gate lines, then each shift register can be controlled independently, but the number of signal lines and connection pins increases
Solution Approach 1:
A single control signal line is designed to serve dual purposes by controlling both the first shift register (for odd gate lines) and the second shift register (for even gate lines). The control signal is reused and selectively applied to different shift registers based on timing control, reducing the total number of control signal lines from multiple to just one while maintaining independent control capability.
Solution Approach 2:
The control signal is applied periodically and selectively to different shift registers. The timing controller enables the control signal to be applied to the first shift register during odd gate line periods and to the second shift register during even gate line periods, achieving independent control through time-division multiplexing rather than requiring separate dedicated control lines.
2Loss of time
If multiple control signals are used to drive separate shift registers, then precise timing control is achieved, but the bezel area increases due to more connection pins
Solution Approach 1:
The single control signal line performs multiple functions by controlling both shift registers through time-division multiplexing. The timing controller manages when the control signal is applied to each shift register, maintaining precise timing control while reducing the number of connection pins and thereby minimizing the bezel area.
Solution Approach 2:
The timing of control signal application is dynamically changed based on whether odd or even gate lines are being driven. The timing controller adjusts the enable timing of the control signal to match the operational requirements of different shift registers, preserving timing precision without requiring additional dedicated control lines that would increase bezel area.
3Ease of operation
If separate control signals are applied to first and second shift registers, then independent operation is enabled, but the number of elements on the printed circuit board increases
Solution Approach 1:
The control signal line is designed as a multi-functional element that controls both the first and second shift registers. By reusing the same control signal for both shift registers with different timing enables, the number of control signal lines and corresponding PCB elements is reduced from multiple to one, while independent operation capability is maintained through the timing control mechanism.
4Ease of manufacture
If the gate driver is mounted on the display panel with multiple signal lines, then COG or LOG structure is achieved, but the non-display area is occupied by signal lines
Solution Approach 1:
The control signal line structure is optimized to be multi-functional, allowing a single control signal line to control both shift registers. This reduces the total number of signal lines required on the display panel, thereby freeing up non-display area while maintaining the COG or LOG mounting structure and its manufacturing advantages.
Data Source
AI summary
A display device according to an embodiment includes a display panel in which a plurality of gate and date lines are formed, and a gate driver configured to include first and second shift registers and a control portion. The first shift register is disposed opposite to odd-numbered gate lines of the display panel. The second shift register is disposed opposite to even-numbered gate lines of the display panel. The control portion transfers a first control signal to the first shift register, derives a second control signal from the first control signal, and applies the second control signal to the second shift register.