Gate Driver Node Stabilization for Display Flicker Control

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Solution Overview

Problem

Display devices face issues with luminance deviation, such as crosstalk and flicker, due to parasitic capacitance coupling between data lines and gate lines, and unstable node voltages during initial driving, leading to inconsistent light emission.

Innovation Solution

A gate driver is designed with a second signal processor that controls the voltage level of a third node for low-level output of a gate signal, and an initializing part to stabilize light emission during initial driving.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If data lines are routed to cross scan lines and emission control lines to achieve high-resolution display, then image resolution is improved, but parasitic capacitance coupling increases causing luminance deviation and crosstalk

Engineering Contradiction:
Improveimage resolutionVSAvoidparasitic capacitance coupling
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

A ground line is introduced as an intermediary element between the data line and the scan line/emission control line. This ground line acts as a shield that reduces parasitic capacitance coupling by providing a reference potential, thereby minimizing crosstalk while allowing the data line to cross the scan line for high-resolution display

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If driving frequency is increased to improve refresh rate and image quality, then display performance is improved, but data signal voltage swings rapidly causing unstable node voltages and luminance deviation

Engineering Contradiction:
Improvedriving frequencyVSAvoidnode voltage stability
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

An initializing part is introduced that performs preliminary action during the initial driving period. This part includes initialization transistors and capacitors that pre-establish stable node voltages before the main high-frequency driving begins, preventing voltage instability and luminance deviation during the critical initial phase while allowing high driving frequency to proceed

Inventive Principle:
Principle #10Preliminary action

3Productivity

If high driving frequency is used to achieve fast refresh rate, then productivity is improved, but parasitic capacitance coupling causes crosstalk and flicker

Engineering Contradiction:
Improverefresh rateVSAvoidcrosstalk and flicker
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The ground line serves as a mediator that shields against parasitic capacitance coupling during high-frequency operation. By providing a stable reference potential, it minimizes crosstalk between signal lines, thereby enabling high refresh rates without the accompanying crosstalk and flicker artifacts

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If data line crosses scan line and emission control line to simplify routing, then device layout is simplified, but parasitic capacitance increases causing signal interference

Engineering Contradiction:
Improverouting complexityVSAvoidsignal interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The ground line is positioned between the data line and the scan line/emission control line to act as a shielding intermediary. This allows the data line to cross the scan line for simplified routing while the ground line prevents signal interference by reducing parasitic capacitance coupling

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12347391B2Gate driver and display device including the same
Publication Date: 2025.07.01 SAMSUNG DISPLAY CO LTD
  • US12347391B2 patent drawing
  • US12347391B2 patent drawing
  • US12347391B2 patent drawing

AI summary

A gate driver includes a stage configured to output a gate signal, the stage including an input part configured to control a voltage of a first node and a voltage of a second node based on signals supplied to a first input terminal and a second input terminal, an output part configured to supply a voltage of a first power source or a voltage of a second power source as the gate signal to an output terminal based on a voltage of a third node and a voltage of a fourth node, a first signal processing part configured to supply the voltage of the second power source to the fourth node based on the voltage of the first node, or to electrically connect the second node and the fourth node through a fifth node based on a signal supplied to a third input terminal, and a second signal processing part including a first transistor connected between the third node and a sixth node to control the voltage of the third node based on an operation of the first transistor.