Gate Driver Staggered Output for Power Down Thermal Management

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Solution Overview

Problem

Gate drivers in flat panel display devices face overheating and potential damage due to excessive current supply during power down modes, leading to degradation of image quality and hardware issues.

Innovation Solution

A gate driver system that includes a gate signal processor, controller, and output circuits to synchronize gate clock signals and generate driving control signals with delayed activation times, distributing the load and preventing simultaneous high current supply during power down modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gate driver supplies very large charging currents at the same time to drive the display panel in power down mode, then the display panel can be driven to display the entire screen in black or white, but the gate driver may be severely heated or internal parts may be damaged

Engineering Contradiction:
Improvespeed of screen clearingVSAvoidgate driver durability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The gate driver divides the simultaneous charging of all gate lines into sequential segments. Instead of charging all gate lines at once, the driver charges them one by one or in small groups over multiple time periods, thereby distributing the current load and preventing overheating while still achieving the screen clearing function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate driver employs periodic action by repeating the charging process across multiple time periods. The screen clearing operation is divided into sequential phases where different sets of gate lines are charged in alternating time periods, converting a single high-current event into multiple lower-current periodic events.

Inventive Principle:
Principle #19Periodic action

2Ease of operation

If the gate driver outputs all gate driving signals at the same timing in power down mode, then the entire screen can be displayed in black or white, but excessive currents are supplied at the same time causing heat generation and potential damage

Engineering Contradiction:
Improvesimplicity of power down mode operationVSAvoidgate driver temperature
Core Design Contradiction:
Ease of operationVSTemperature

Solution Approach 1:

The gate driver segments the simultaneous signal output into sequential output operations. Different gate driving signals are output at different time periods rather than simultaneously, dividing the thermal load while maintaining the functional effect of screen-wide display control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate driver dynamically adjusts the timing of signal output based on the specific operating conditions. In power down mode, the driver adaptively staggers the output timing of different gate signals to manage current distribution and thermal characteristics, rather than using a fixed simultaneous output pattern.

Inventive Principle:
Principle #15Dynamics

3Reliability

If the gate driver supplies excessive currents simultaneously in power down mode, then the display function can be maintained, but wirings or elements inside the gate driver may be damaged

Engineering Contradiction:
Improvedisplay function continuityVSAvoiddamage to gate driver components
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The gate driver applies beforehand cushioning by pre-distributing the current load across multiple time periods before any potential damage can occur. The sequential charging approach prevents the accumulation of excessive current that would otherwise cause thermal damage to wirings and internal elements, cushioning against potential harm through advance temporal distribution.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS10431175B2Gate driver and control method thereof
Publication Date: 2019.10.01 SILICON WORKS CO LTD
  • US10431175B2 patent drawing
  • US10431175B2 patent drawing
  • US10431175B2 patent drawing

AI summary

Provided are a gate driver and a control method thereof. The gate driver receives a power down control signal corresponding to a power down mode, controls an operation of a gate signal processor using the power down control signal which is activated in response to the power down mode, and provides a gate high voltage or gate low voltage for a display panel in response to the power down control signal.