Display Gate Driver Short Circuit Protection via Static Current Sensing
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Solution Overview
Problem
Display apparatuses face damage due to overcurrent caused by short circuits in the gate driver, which existing technologies fail to effectively detect and prevent.
Innovation Solution
A display apparatus with a short circuit protector that senses static current at each falling edge of gate control clocks, counts the detection, and outputs a shut-down signal when the count value exceeds a reference count value, shutting down the voltage generator to prevent damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driver operates continuously to drive the display panel, then display functionality is maintained, but overcurrent damage occurs when short circuits happen in the gate driver
Solution Approach 1:
The patent applies preliminary action by detecting static current at each falling edge of gate control clocks before full operation commences. The short circuit protector senses current at critical moments (falling edges) to identify potential short circuits before they cause damage, enabling preventive shutdown of the voltage generator.
Solution Approach 2:
The patent implements feedback through the short circuit protector that continuously monitors static current in the gate driver and provides feedback to the voltage generator. When the count value of detected static current exceeds the reference count value, the system shuts down the voltage generator to prevent overcurrent damage.
2Measurement precision
If static current is detected at every falling edge of gate control clocks, then short circuit detection accuracy is improved, but the number of detection operations increases
Solution Approach 1:
The patent applies periodic action by detecting static current at each falling edge of gate control clocks in a systematic periodic manner. This periodic detection at critical moments (falling edges) provides sufficient precision for short circuit detection without requiring continuous monitoring, thus maintaining efficiency.
Solution Approach 2:
The system uses the existing gate control clock signals to trigger detection operations, leveraging the natural periodicity of the clock system. The short circuit protector utilizes the falling edges of gate control clocks as trigger points, eliminating the need for separate detection timing mechanisms.
3Object-affected harmful factors
If the voltage generator is shut down upon detecting short circuit, then component damage is prevented, but display operation is interrupted
Solution Approach 1:
The patent converts the harmful effect of potential short circuits into a beneficial protective mechanism. By detecting static current at falling edges and using the count value to determine when to shut down, the system transforms what could be a catastrophic failure into a controlled protective action that prevents damage while minimizing operational interruption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively detects short circuits in the gate driver and prevents damage by shutting down the voltage generator, thereby protecting components and devices from overcurrent.
Implementation Method 1
a current sensor configured to sense a current of each of the control clocks at each falling edge of each of the gate control clocks
Data Source
AI summary
A display apparatus includes a plurality of pixels for receiving a plurality of gate signals, and a plurality of data voltages, a level shifter for receiving a gate driving voltage and a plurality of gate control clocks to generate a plurality of reference clocks, and for generating a plurality of control clocks by delaying the reference clocks by a predetermined time, a gate driver for outputting the gate signals in response to the control clocks, a short circuit protector for sensing a current of each control clock at each falling edge of each gate control clock to detect a static current of the each control clock, and for outputting a shut-down signal based on a count of the static current detection, and a voltage generator for providing the gate driving voltage to the level shifter, and shutting down in response to the shut-down signal.