Gate Driver Circuit Integration in Display Panel Bezel Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional display panels with integrated gate driver circuits often occupy significant non-display regions, leading to larger bezels and reduced competitiveness due to the large area required for the gate driver circuit in the non-display region.
Innovation Solution
The display panel design incorporates a gate driver circuit with shift registers and control signal lines positioned within the display region, allowing thin film transistor groups to be distributed between adjacent sub-pixels, thereby reducing the area occupied by the gate driver circuit in the non-display region and enabling a narrower bezel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate driver circuit is integrated in the non-display region, then the signal transmission is efficient, but the bezel area increases
Solution Approach 1:
The gate driver circuit is moved from the traditional non-display region (horizontal dimension) into the display region, specifically utilizing the vertical space between adjacent sub-pixels. This dimensional repositioning allows the circuit to occupy otherwise wasted space, reducing bezel area while maintaining signal transmission efficiency through direct coupling with pixel driver circuits.
Solution Approach 2:
The invention applies different functional zones within the display region by placing thin film transistor groups in specific locations between sub-pixels. This local differentiation allows the gate driver circuit to be embedded in the display region without interfering with pixel performance, as each area is optimized for its specific function (display vs. driving circuitry).
2Device complexity
If the gate driver circuit occupies non-display region, then the circuit layout is simple, but the display area ratio decreases
Solution Approach 1:
The gate driver circuit and display region are merged into a single integrated structure. The thin film transistor groups forming the gate driver circuit are embedded within the display region and share space with sub-pixels, eliminating the need for separate non-display region allocation and maximizing display area ratio.
Solution Approach 2:
The circuit layout transitions from a planar arrangement in the non-display region to a vertical arrangement between sub-pixels in the display region. This dimensional change allows the circuit to occupy interstitial space without increasing overall device footprint or complicating the layout significantly.
3Area of stationary object
If thin film transistor groups are placed between sub-pixels, then the gate driver circuit area is reduced, but the manufacturing precision requirement increases
Solution Approach 1:
The invention designates specific local zones between sub-pixels for placing thin film transistor groups, creating dedicated areas for circuit components. This localized approach standardizes the placement positions and reduces manufacturing variability, as each transistor group has a predetermined location optimized for minimal interference with adjacent sub-pixels.
Data Source
AI summary
A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.