Gate Driver Circuit Voltage Boosting for SiC Switching
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional gate driver circuits face challenges in high-speed semiconductor device driving due to poor responsivity, complex circuit structures, increased production costs, and a high likelihood of erroneous ignitions, particularly when dealing with compound semiconductors like SiC and GaN, which experience excessive gate current peaks.
Innovation Solution
A gate driver circuit with a positive power supply for forward bias, a negative power supply for backward bias, and bias circuits that charge a capacitor using the negative power supply, allowing for voltage boosting during the transition period to reduce peak current and prevent erroneous ignitions by controlling the charge amount in the capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a conventional gate driver circuit uses a dedicated power supply to charge a capacitor for high-speed switching, then the switching speed is improved, but the circuit structure becomes complex and production cost increases
Solution Approach 1:
The patent merges the capacitor charging function into the existing positive and negative power supplies already present in the gate driver circuit. The positive power supply charges the capacitor during the off-state, eliminating the need for a dedicated charging power supply. This integration reduces circuit complexity while maintaining the ability to provide boosted voltage for high-speed switching during turn-on.
Solution Approach 2:
The positive and negative power supplies in the gate driver circuit serve multiple functions: they provide bias voltages for the semiconductor device during normal operation and simultaneously charge/discharge the capacitor to generate boosted voltage for high-speed switching. This multi-functionality eliminates the need for separate dedicated charging circuits, reducing overall device complexity.
2Speed
If the capacitor accumulates large electric charge for fast turn-on, then the switching speed is improved, but the gate current peak becomes excessively high causing erroneous ignitions
Solution Approach 1:
The patent implements dynamic control of the capacitor charge amount based on the switching state. During turn-on, the capacitor is charged to a specific voltage level that provides sufficient boost for fast switching. During turn-off, the capacitor is discharged through the negative power supply. This dynamic charging and discharging ensures the capacitor provides just enough charge for high-speed switching without creating excessive current peaks that would cause erroneous ignitions.
Solution Approach 2:
The patent controls the voltage level to which the capacitor is charged, ensuring it does not accumulate excessive charge. By regulating the capacitor voltage within an appropriate range during the off-state and controlling the discharge timing during the on-state, the circuit achieves fast switching while limiting gate current peaks to prevent erroneous ignitions of adjacent devices.
3Device complexity
If the capacitor is charged by the positive power supply, then the circuit structure is simple, but the forward-bias voltage becomes excessively high (twice the positive power supply voltage)
Solution Approach 1:
Instead of charging the capacitor from the positive power supply and adding positive voltage, the patent inverts the approach by having the negative power supply charge the capacitor. During turn-on, the capacitor voltage is added to the positive power supply voltage in series, creating a controlled boosted forward-bias voltage. This inversion prevents the forward-bias voltage from becoming excessively high (twice the positive supply voltage) while maintaining a simple circuit structure using existing power supplies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables high-speed semiconductor device driving with a cost-reduced, simple structure, suppresses current peaks, and prevents erroneous ignitions by managing the gate voltage stepwise and reducing the peak value of charging current for Miller capacitance.
Implementation Method 1
a capacitor (5) which accumulates electric charge according to a charged voltage by the voltage of the negative power supply (3)
Implementation Method 2
a voltage boosted by adding the charged voltage of the capacitor (5) onto the voltage of the positive power supply (2)
Data Source
AI summary
A gate driver circuit capable of quickly driving a semiconductor device without erroneous ignitions. It has a positive power supply for forward bias, a negative power supply for backward bias, a first bias circuit that outputs the positive- or negative-power-supply voltage according to gate driver signal S, a capacitor that is charged by the negative-power-supply voltage when the first bias circuit outputs the negative-power-supply voltage, and a second bias circuit that supplies the gate of the semiconductor device with the positive- or negative-power-supply voltage according to gate driver signal S. Only in an early stage of a transition period during which the semiconductor device is turned on, the second bias circuit supplies the gate of the semiconductor device, instead of the positive-power-supply voltage, with a voltage boosted by adding the charged voltage of the capacitor onto the positive-power-supply voltage outputted from the first bias circuit.