Gate Driver Voltage Clamp for Lower MOSFET On-Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing power supply circuits in portable devices face challenges in achieving high load current efficiency with minimal impact on die area, as increasing switching transistor size leads to increased gate capacitance and switching loss, especially at low battery voltages.
Innovation Solution
The introduction of an additional voltage domain in the gate driver architecture, utilizing a voltage clamp and additional switching devices to achieve higher gate-to-source voltage magnitude, reducing drain-to-source on-resistance and conduction loss without significantly increasing the gate driver IC area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the switching transistor size is increased to achieve high load current efficiency, then the current-driving capability is improved, but the gate capacitance and switching loss increase
Solution Approach 1:
The patent changes the gate-to-source voltage parameter by introducing an additional voltage domain (third voltage rail) that provides a voltage magnitude greater than the difference between the first and second voltage rails. This increased voltage magnitude reduces the drain-to-source on-resistance of the switching transistor, thereby reducing conduction loss and improving current-driving capability without requiring a larger transistor size that would increase gate capacitance and switching loss.
2Loss of energy
If the switching transistor size is increased to reduce on-resistance, then the conduction loss is reduced, but the gate driver IC area increases
Solution Approach 1:
The patent reduces conduction loss by changing the electrical parameter of gate-to-source voltage magnitude rather than by increasing the physical size of the switching transistor. The additional voltage domain provides a higher voltage magnitude that directly reduces the on-resistance through the transistor's inherent characteristics, achieving lower conduction loss without increasing the transistor area or gate driver IC area.
Data Source
AI summary
Techniques and apparatus for driving transistor gates of a switched-mode power supply (SMPS) circuit. One example power supply circuit generally includes a switching converter having a switching transistor and a gate driver having an output coupled to a gate of the switching transistor. The gate driver includes a first switching device coupled between the output of the gate driver and a first voltage rail; a second switching device coupled between the output of the gate driver and a voltage node of the gate driver; a third switching device coupled between the voltage node of the gate driver and a second voltage rail; and a voltage clamp coupled in series with a fourth switching device, the voltage clamp and the fourth switching device being coupled between a third voltage rail and the voltage node (or the output of the gate driver).


