Gate Driver DC Voltage Compensation for Display Uniformity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In high-definition large panels, the increased load on gate bus lines and larger wiring resistance lead to significant voltage drops in direct current voltage, resulting in uneven scanning voltages across the panel, causing display unevenness and increased power consumption.
Innovation Solution
A display device with a scanning signal line drive circuit that includes a shift register with unit circuits having a first and second output node, and output control transistors to manage direct current voltage, reducing charge/discharge operations and varying voltage levels to minimize voltage drops and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a direct current voltage is applied as the active scanning signal to reduce power consumption, then power consumption is reduced, but wiring resistance causes voltage drops that result in display unevenness
Solution Approach 1:
The patent changes the voltage level parameter of the direct current voltage dynamically. A voltage level adjustment circuit is introduced that varies the DC voltage level according to the scanning line position. For scanning lines farther from the voltage input terminal, the voltage level is increased to compensate for wiring resistance drops, while lines closer to the terminal use lower voltage levels. This parameter change resolves the contradiction by maintaining uniform scanning voltages across all lines while keeping power consumption low.
2Manufacturing precision
If the panel size is increased to achieve high definition display, then display quality is improved, but wiring resistance increases causing larger voltage drops
Solution Approach 1:
The patent applies local quality by providing different voltage levels to different regions of the panel. The voltage level adjustment circuit detects the position of each scanning line and applies an appropriate voltage compensation specific to that location. Scanning lines in regions with higher wiring resistance (typically farther from the input terminal) receive higher voltage levels, while lines in regions with lower resistance receive standard levels. This localized approach allows high definition display across large panels while compensating for regional variations in wiring resistance.
3Device complexity
If the gate driver is formed directly on the array substrate to narrow the frame, then device integration is improved, but wiring resistance within the substrate increases
Solution Approach 1:
The patent changes the voltage parameter dynamically based on the integrated gate driver's internal structure. Since the gate driver is formed on the array substrate with inherent wiring resistance, the voltage level adjustment circuit modifies the DC voltage level according to the distance from the voltage input terminal within the integrated structure. This allows the compact integrated design to function effectively by compensating for the wiring resistance introduced by the on-substrate integration.
Data Source
AI summary
There is adopted a gate driver with a system of applying a direct current voltage as an active scanning signal to a gate bus line through a buffer transistor in a unit circuit that composes a shift register, and a display device is provided with a direct current voltage generation circuit that generates the direct current voltage. The direct current voltage generation circuit changes a voltage level of the direct current voltage in each frame period. For example, when a direct current voltage input terminal is provided on a vertical scanning end side, the direct current voltage generation circuit gradually decreases the voltage level of the direct current voltage in each frame period.