Gate Driver Voltage Inversion for DC Stress Distribution
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Solution Overview
Problem
In display devices, the gate driver stages experience unstable operation due to long-term DC stress on certain transistors, leading to changes in their characteristics, as the period for outputting scan signals is short, causing the QB node to maintain high voltage for most of the frame.
Innovation Solution
A display device with a gate driver that uses a plurality of stages connected in cascade, employing first and second driving voltages of opposite phases, which are inverted at given intervals, to control voltages at primary nodes, thereby distributing DC stress more evenly across transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the gate driver outputs scan signals for a short period, then the scanning speed is improved, but the transistors are subjected to long-term DC stress causing characteristic changes
Solution Approach 1:
The patent applies periodic action by inverting the first and second driving voltages at given intervals. This causes the Q1 and Q1B nodes to alternately maintain high voltage, thereby periodically switching which transistors are subjected to DC stress. This periodic inversion prevents any single transistor from experiencing continuous DC stress, resolving the contradiction between fast scanning and transistor stability.
2Loss of time
If the QB node maintains high voltage for most of the frame, then the scan signal output period is shortened, but the third transistor and pull-down transistor experience concentrated DC stress
Solution Approach 1:
The patent uses inversion by switching between two complementary voltage states (first driving voltage and second driving voltage). In one state, the Q1 node is high and Q1B is low; in the other state, Q1 is low and Q1B is high. This inversion ensures that different transistors experience DC stress at different times, distributing the harmful DC stress rather than concentrating it on specific transistors like T3 and Tpd.
3Reliability
If certain transistors are subjected to DC stress for long time, then the stage operation becomes unstable, but maintaining stable operation requires equal stress distribution
Solution Approach 1:
The patent changes the voltage parameters by using two different driving voltages (first driving voltage and second driving voltage) that are inverted at given intervals. This parameter change allows the circuit to switch between two operational states, ensuring that all transistors experience similar electrical stress over time. The simple inversion mechanism achieves equal stress distribution without requiring complex control logic.
Data Source
AI summary
A display device comprises: a pixel array including pixels connected to gate lines; a gate driver that sequentially supplies scan signals to the gate lines by using a plurality of stages connected in cascade; and a driving voltage generator that supplies first and second driving voltages to the gate driver and inverts the first and second driving voltages of opposite phases at given intervals, wherein an nth stage (n is a natural number), among the stages of the gate driver, comprises: a start controller that charges a Q1 node in a period when an (n−1)th scan signal and a first clock signal are synchronized, and charges a Q1B node in a period when an (n−1)th carry signal, opposite in phase to the (n−1)th scan signal, and the first clock signal are synchronized; a first node controller that charges a Q2 node or a Q2B node in response to a voltage at the Q1 node; a first output control transistor that outputs an nth scan signal through a Q node in response to a voltage at the Q2 node; and a second output control transistor that charges the Q node with the second driving voltage in response to a voltage at the Q2B node.