Gate Driver Voltage Multiplexer for Power Loss Reduction
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Solution Overview
Problem
Power transistors face inefficiencies in gate drive capacity reduction under high temperature or high current conditions, leading to increased power loss and reduced power density.
Innovation Solution
A gate driving circuit that dynamically adjusts the bias voltage from a first level (VDD1) to a second level (VDD2) after a predetermined delay, and immediately switches to VDD2 in case of fault conditions like high temperature or high current, using a voltage multiplexer and fault detection logic to manage the gate drive capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the gate driver operates at high voltage continuously, then the drive capacity is sufficient, but the power consumption increases
Solution Approach 1:
The gate driver dynamically adjusts the supply voltage between two levels (VDD1 and VDD2) based on operating conditions. The voltage multiplexer switches between voltage sources, and the delay logic controls the timing of voltage transitions, enabling the system to adapt power consumption to actual drive capacity requirements rather than operating at fixed high voltage
Solution Approach 2:
The invention changes the voltage parameter of the gate driver based on detected fault conditions. When fault conditions are detected (such as high temperature or high current), the system switches from VDD1 to VDD2, altering the operating voltage parameter to optimize the trade-off between drive capacity and power consumption
2Loss of energy
If the gate driver reduces drive capacity under fault conditions, then the power loss decreases, but the power density reduces
Solution Approach 1:
The delay logic generates a delayed version of the input signal to control the voltage multiplexer. This preliminary action ensures that the voltage transition is timed appropriately, allowing the gate driver to maintain optimal power density during normal operation while preparing for power loss reduction when fault conditions occur
Solution Approach 2:
The fault detection logic monitors operating conditions and provides feedback to control the voltage multiplexer. This feedback mechanism allows the system to detect fault conditions (high temperature, high current) and automatically adjust the supply voltage to balance power loss reduction with maintaining adequate power density
3Use of energy by moving object
If the gate driver switches voltage levels dynamically, then the power efficiency improves, but the circuit complexity increases
Solution Approach 1:
The gate driver is segmented into distinct functional blocks: fault detection logic, delay logic, and voltage multiplexer. Each block performs a specific function, making the overall complex system manageable through modular design where each segment can be independently analyzed and implemented
4Reliability
If the gate driver uses fault detection logic, then the reliability under fault conditions improves, but the device complexity increases
Solution Approach 1:
The fault detection logic is designed to detect multiple types of fault conditions (high temperature, high current) using a single integrated logic block. This multi-functional approach improves reliability under various fault conditions while minimizing the increase in device complexity by avoiding separate detection circuits for each fault type
Data Source
AI summary
A circuit comprises a gate driver having a supply voltage terminal and configured to generate an output at an output terminal based on an input. A voltage multiplexer is configured to connect a first voltage terminal to the supply voltage terminal responsive to a voltage select signal having a first value and connect a second voltage terminal to the supply voltage terminal responsive to the voltage select signal having a second value. First logic is configured to generate a fault signal responsive to detecting one of a first fault condition associated with operation of the gate driver or a second fault condition associated with operation of the gate driver and generate the voltage select signal having the second value based on the fault signal. Second logic is configured to generate the voltage select signal having the second value after a predetermined delay period based on a value of the input.