Gate Driver Voltage Selection for OLED Luminance Uniformity
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Solution Overview
Problem
Organic light emitting display devices face issues with reduced display quality due to degradation of organic light emitting diodes, uneven luminance, and RC delay in gate signals, particularly in large area and high resolution displays, leading to potential image quality degradation and after-images.
Innovation Solution
A gate driver system that includes a selector for mode-dependent low voltage selection and a level shifter generating clock signals with varying voltage levels, allowing for improved gate signal generation and data signal application, thereby reducing RC delay and enhancing image quality by alternating between sensing and display modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If organic light emitting diodes are used for high luminance display, then display brightness is improved, but OLED degradation accelerates and after-images occur
Solution Approach 1:
The patent implements periodic switching between sensing mode and display mode. During sensing mode, the OLED is kept at low luminance to minimize degradation. During display mode, high luminance is achieved through rapid gate signal transitions. This periodic alternation allows the system to achieve high display brightness while limiting cumulative OLED stress and extending lifetime.
Solution Approach 2:
The patent performs sensing measurements before actual display operation. By characterizing OLED properties and transistor parameters in advance during sensing mode, the system can optimize display mode operation to prevent degradation before it occurs, thereby maintaining both high luminance and reliability.
2Speed
If gate signal transitions are made rapid to reduce RC delay, then signal transmission speed is improved, but voltage level control becomes more difficult
Solution Approach 1:
The patent dynamically changes voltage levels based on operational mode. During sensing mode, standard voltage levels are used for stable measurements. During display mode, the gate driver rapidly transitions between distinct voltage levels (e.g., 0V and 10V) to achieve fast signal transmission. This parameter adaptation allows rapid gate signaling without excessive complexity in the control circuitry.
Solution Approach 2:
The gate driver circuit is designed with dynamic voltage level switching capability. The driver can adapt its voltage output based on the operational mode, using faster voltage transitions during display mode to overcome RC delays while maintaining simpler control during sensing mode. This dynamic behavior enables speed improvement without proportional complexity increase.
3Reliability
If sensing mode is implemented to compensate for degradation, then display quality is improved, but operation time increases
Solution Approach 1:
The patent implements periodic sensing and display cycles. Brief sensing periods are interspersed with longer display periods, allowing degradation compensation without requiring continuous sensing operation. This periodic approach maintains display quality while minimizing time loss compared to continuous sensing alternatives.
Solution Approach 2:
By performing sensing measurements in advance before display operation, the system characterizes OLED and transistor properties beforehand. This preliminary characterization allows the display mode to proceed efficiently without requiring frequent interruptions for sensing, thereby reducing overall operation time while maintaining quality.
4Speed
If data signals are applied rapidly to subpixels, then response speed is improved, but RC delay causes signal misalignment
Solution Approach 1:
The patent changes the voltage level parameters of gate signals during display mode to compensate for RC delay effects. By using optimized voltage transitions and timing adjusted for the specific voltage levels, the system achieves fast data signal response while maintaining precise signal alignment across subpixels, preventing misalignment that would occur with standard voltage levels.
Data Source
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AI summary
In accordance with embodiments of the present disclosure, a gate driver is provided that includes: a selector receiving a first low voltage and a second low voltage with a lower level than the first low voltage, and selecting and outputting one of the first low voltage and the second low voltage such that in response to a mode selection signal, the first low voltage is selected in a first mode and the second low voltage is selected in a second mode, and a level shifter including a first output terminal receiving a high voltage and the first low voltage, and outputting a clock signal with a voltage level between the high voltage and the first low voltage, and a second output terminal outputting a direct current (DC) signal corresponding to the first low voltage or the second low voltage selected in the selector. Further, accordance with embodiments of the present disclosure, provided are an organic light emitting display device including the gate driver and a method of driving the gate driver and the organic light emitting display device.