Gate Driving Circuit Stabilization for Display Transistor Reliability
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Solution Overview
Problem
Transistors in gate drivers of display apparatuses deteriorate due to signal waveforms and voltage levels, leading to potential damage and reduced reliability.
Innovation Solution
A gate driving circuit with a first pull up control circuit, pull down control circuit, boosting circuit, gate output circuit, and stabilizing circuit, including a boosting capacitor and switching elements, to manage and stabilize voltage levels, preventing transistor damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are used in gate drivers with standard voltage levels and signal waveforms, then the circuit operation is simple and reliable, but the transistors deteriorate over time due to voltage stress and signal waveforms, leading to potential damage and reduced reliability
Solution Approach 1:
The stabilizing circuit is activated before the transistor is subjected to high voltage stress to pre-establish protective conditions. The circuit proactively adjusts voltage levels and signal waveforms in advance to prevent deterioration, rather than reacting after damage occurs.
Solution Approach 2:
The stabilizing circuit acts as an intermediary between the high voltage signal source and the transistor. It mediates the voltage stress and signal waveform effects by introducing intermediate voltage levels and conditioning signals, thereby protecting the transistor from direct exposure to harmful factors.
2Power
If high voltage levels are applied to transistors in the gate driver, then the driving capability and signal strength are improved, but the transistor deterioration accelerates due to increased voltage stress
Solution Approach 1:
The stabilizing circuit dynamically changes voltage parameters by adjusting the voltage level applied to the transistor based on operating conditions. When high power output is needed, it temporarily allows higher voltages while implementing protective measures, and reduces voltage during normal operation to prevent deterioration, thus optimizing the balance between power and reliability.
3Device complexity
If the gate driver circuit uses simple voltage control without stabilization, then the device complexity is reduced, but transistor damage occurs due to uncontrolled voltage levels and signal waveforms
Solution Approach 1:
The stabilizing circuit is designed to automatically monitor and adjust voltage levels without requiring external control or complex intervention. It self-regulates the voltage applied to transistors based on inherent circuit conditions, providing protection through self-service mechanisms that minimize additional complexity while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the reliability of the gate driving circuit and display apparatus by preventing transistor deterioration and current leakage, thereby maintaining circuit integrity.
Implementation Method 1
The boosting circuit includes a boosting capacitor and is configured to boost the voltage of the pull up control node
Implementation Method 2
a fourth switching element including a control electrode configured to receive the previous carry signal, a first electrode configured to receive the previous carry signal and a second electrode connected to the pull up control node
Data Source
AI summary
A gate driving circuit includes: a first pull up control circuit for controlling a voltage of a pull up control node in response to a previous carry signal; a pull down control circuit for controlling a voltage of a pull down control node in response to the voltage of the pull up control node; a boosting circuit including a boosting capacitor and for boosting the voltage of the pull up control node; a gate output circuit for outputting a plurality of gate signals having different timings in response to the voltage of the pull up control node and the voltage of the pull down control node; and a stabilizing circuit including a control electrode connected to an end of the boosting capacitor, a first electrode for receiving a first high power voltage and a second electrode connected to the first pull up control circuit.


