Gate Driver Voltage Switching for Lower IGBT Conduction Loss

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Solution Overview

Problem

Conventional gate driver circuits for power semiconductor devices face a trade-off between minimizing conduction losses and managing short-circuit currents, as higher gate-emitter voltages reduce saturation voltage but increase short-circuit currents, leading to inefficient operation and thermal stress.

Innovation Solution

A gate driver circuit with a selector circuit that dynamically switches between two voltage sources, a higher and a lower voltage, based on the input control signal's logic state, allowing for a delayed transition to a higher voltage during turn-on to reduce saturation voltage without compromising short-circuit current characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a higher gate-emitter voltage is applied to reduce saturation voltage and conduction losses, then conduction losses are reduced, but short-circuit current increases

Engineering Contradiction:
Improveconduction lossesVSAvoidshort-circuit current
Core Design Contradiction:
Loss of energyVSObject-generated harmful factors

Solution Approach 1:

The gate driver circuit dynamically switches between two voltage sources (higher and lower voltages) based on the input control signal's logic state. During turn-on, the circuit delays the transition to the higher voltage by a predetermined time interval, allowing the gate voltage to rise gradually. This dynamic voltage adjustment reduces the rate of rise of collector current during short-circuit conditions while maintaining low conduction losses during normal operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The selector circuit applies a lower voltage initially during the turn-on transition before switching to the higher voltage. This preliminary action with reduced voltage limits the initial surge of short-circuit current, and only after the predetermined delay (when the IGBT is fully turned on) does the circuit switch to the higher voltage to minimize conduction losses.

Inventive Principle:
Principle #10Preliminary action

2Loss of energy

If a higher gate-emitter voltage is applied to achieve lower saturation voltage, then conduction losses are reduced, but thermal stress increases

Engineering Contradiction:
Improveconduction lossesVSAvoidthermal stress
Core Design Contradiction:
Loss of energyVSTemperature

Solution Approach 1:

The circuit dynamically adjusts gate voltage based on switching state. During turn-on transitions, the delayed switching to higher voltage reduces instantaneous power dissipation and thermal stress spikes. During steady-state conduction, the higher voltage maintains low saturation voltage and conduction losses, optimizing the thermal profile over the complete switching cycle.

Inventive Principle:
Principle #15Dynamics

3Object-generated harmful factors

If a selector circuit with delayed transition is used to reduce short-circuit current, then short-circuit current is limited, but device complexity increases

Engineering Contradiction:
Improveshort-circuit currentVSAvoidcircuit complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The gate driver is segmented into two voltage sources (higher and lower voltages) with a selector circuit that switches between them. This segmentation allows independent optimization of turn-on characteristics (using lower voltage initially) and conduction efficiency (using higher voltage subsequently), resolving the contradiction between limiting short-circuit current and maintaining low conduction losses.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11165422B2Gate driver circuit with reduced power semiconductor conduction loss
Publication Date: 2021.11.02 DELTA ELECTRONICS INC(CN)
  • US11165422B2 patent drawing
  • US11165422B2 patent drawing
  • US11165422B2 patent drawing

AI summary

A gate driver circuit receiving an input control signal and providing a voltage at a gate terminal of a semiconductor switching device (e.g., an IGBT) may include: (i) a first voltage source providing a first voltage; (ii) a second voltage source providing a second voltage, wherein the first voltage is higher than the second voltage; and (iii) a selector circuit selecting, based on the input control signal's logic state, either the first voltage or the second voltage to be placed on the gate terminal of the semiconductor switching device.