Gate Driver Circuit Wiring Reduction for Selective Display Driving
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Solution Overview
Problem
Conventional gate driver circuits for display devices require multiple signals and connections, increasing complexity and power consumption, and cannot selectively drive specific gate signal lines efficiently.
Innovation Solution
A display device with a simplified circuit configuration using multiple stages of signal processing circuits, each comprising transistors to control gate signal lines, reducing the number of necessary wirings and enabling selective driving of gate signal lines through a clock signal and selection signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple groups of gate driver circuits are used to achieve partial driving, then the ability to selectively drive gate signal lines is improved, but the number of signals and connections required increases
Solution Approach 1:
The patent merges the control signals into a single clock signal line that is shared across all stages. Instead of having separate start pulses for each group, all stages use the same clock signal, reducing the number of connections between the substrate and external circuits while maintaining selective driving capability through the stage selection mechanism
Solution Approach 2:
The gate driver circuit is divided into multiple stages, where each stage controls a specific group of gate signal lines. This segmentation allows selective driving of different sections by controlling which stage is active, while sharing common control signals reduces overall system complexity
2Productivity
If different start pulses are input to different groups, then partial driving is achieved, but the number of signals necessary for driving increases
Solution Approach 1:
The single clock signal line serves multiple functions by being shared across all stages. This universal signal performs the role of start pulses for different groups through the stage selection mechanism, reducing the total number of signals required while maintaining the ability to drive different sections of the gate signal lines
3Adaptability or versatility
If more connections are made between substrate and external circuit, then selective driving is enabled, but wiring complexity increases
Solution Approach 1:
The patent combines multiple control signal lines into a single shared clock signal line. This merging reduces the number of connections between the substrate and external circuits, simplifying the wiring structure while maintaining the capability to selectively drive different sections through the multi-stage architecture
Data Source
AI summary
A display device in which partial driving can be performed with a simplified configuration of a circuit including a wiring. One of signal processing circuits includes a first transistor that controls the potential of its respective gate signal line, and a second transistor that outputs a start signal for the subsequent stage and a reset signal for the preceding stage. A signal for controlling whether the gate signal line is in an active state (a state where a selection signal is output) or a non-active state (a state where a selection signal is not output or a non-selection signal continues to be output) is input to the first transistor. A clock signal is input to the second transistor. Thus, the number of wirings necessary for operating the device is reduced.