Gate Driving Circuit Auxiliary Stabilization for Signal Distortion
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Solution Overview
Problem
In flat screen displays, particularly LCDs, gate signals are distorted due to parasitic resistance and capacitance, leading to reduced pixel recharge time and image display quality, and the need for large border regions for source driving circuits limits design flexibility and increases costs.
Innovation Solution
A gate driving circuit with a shift register circuit on one side of the pixel array and an auxiliary circuit on the other side, using transistors to stabilize and accelerate gate signals, reducing distortion and improving image quality by managing signal voltage and level switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If gate signals are transmitted through gate lines to pixel units, then the gate driving circuit can control data writing in the pixel array, but pulse distortion occurs due to parasitic resistance and capacitance of gate lines, reducing pixel recharge time and image display quality
Solution Approach 1:
The patent introduces an auxiliary circuit as an intermediary component that receives gate signals from the shift register circuit and generates corrected gate signals. This auxiliary circuit acts as a mediator between the gate driving circuit and the pixel array, compensating for signal distortion caused by parasitic resistance and capacitance in the gate lines, thereby improving image display quality while maintaining adequate pixel recharge time
Solution Approach 2:
The auxiliary circuit performs preliminary correction of gate signals before they are transmitted to the pixel array. By pre-compensating for the expected signal distortion and timing issues in advance, the system ensures that the gate signals reaching the pixel units have proper pulse width and timing, preventing pixel recharge time from being reduced
2Reliability
If two source driving circuits are disposed on two sides of the pixel array to reduce pulse distortion, then pulse distortion is reduced, but border regions must have sufficiently large area which adds cost and reduces design flexibility
Solution Approach 1:
The patent extracts the signal correction function from the source driving circuit and places it in a separate auxiliary circuit on the gate driving circuit side. This separation allows the source driving circuits to be minimized or eliminated from the border regions, reducing the area requirements and improving design flexibility while still achieving pulse distortion reduction through the auxiliary circuit's signal correction capabilities
3Ease of operation
If pull-down transistor of each shift register stage stays in conducting state for long time in each frame period, then the circuit can maintain proper operation, but transistor characteristic curve drift occurs which lowers operating stability
Solution Approach 1:
The auxiliary circuit implements periodic control of the pull-down transistor by using periodically inverted clock signals. This causes the pull-down transistor to alternate between conducting and non-conducting states in a periodic manner, preventing it from staying in the conducting state for the entire frame period. This periodic action maintains proper circuit operation while avoiding transistor characteristic curve drift and improving operating stability
Data Source
AI summary
A gate driving circuit includes a shift register circuit and an auxiliary circuit which are disposed at different sides of a pixel array. The shift register circuit includes an (N−1)th shift register stage for generating an (N−1)th gate signal according to a first clock, an Nth shift register stage for generating an Nth gate signal according to a second clock, and an (N+1)th shift register stage for generating an (N+1)th gate signal according to a third clock. The auxiliary circuit includes a first transistor. The first transistor performs the signal voltage stabilization and level switching acceleration operations on the Nth gate signal according to the (N−1)th gate signal and the second clock.