Gate Driving Circuit Back-Bias Leakage Control
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Solution Overview
Problem
The existing gate driving circuits for display devices face challenges in reducing the bezel area and minimizing leakage current, which affects the size and power consumption of the display panel.
Innovation Solution
A gate driving circuit is designed using a cascade structure with signal transmitters that include 4-terminal transistors, which are controlled by back-bias clocks to minimize leakage current and increase on-current, thereby reducing the bezel area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional transistors are used in the gate driving circuit, then the circuit can be simpler, but the leakage current increases and the transistor size must be increased to offset leakage
Solution Approach 1:
The patent applies back-bias voltage to the fourth terminal of the transistor to dynamically adjust the threshold voltage. By changing the bias parameter, the transistor's electrical characteristics are optimized to reduce leakage current while maintaining appropriate drive strength, resolving the contradiction between simplicity and leakage control.
Solution Approach 2:
The fourth terminal of the transistor acts as an intermediary control point that receives back-bias voltage. This additional control terminal mediates between the simple transistor structure and the need for leakage suppression, allowing the transistor to operate with reduced leakage without increasing overall circuit complexity.
2Object-generated harmful factors
If transistor channel width is increased to offset leakage current, then leakage is compensated, but the bezel area occupied by the gate driving circuit increases
Solution Approach 1:
Instead of increasing transistor physical dimensions to compensate for leakage, the patent changes the electrical parameter by applying back-bias voltage to the fourth terminal. This allows leakage compensation through voltage control rather than size increase, thereby maintaining a compact gate driving circuit and reducing bezel area.
3Reliability
If more transistors are used in the gate driving circuit, then the circuit functionality is improved, but the transistor size and bezel area increase
Solution Approach 1:
The patent enhances circuit reliability by implementing back-bias control on existing transistors rather than adding more transistors. By changing the operational parameters through fourth-terminal biasing, the circuit achieves improved functionality and leakage control without increasing the transistor count or occupying additional bezel area.
Data Source
AI summary
A gate driving circuit and a display device including the same are disclosed. The gate driving circuit includes signal transmitters receiving a start pulse, a shift clock, a charge/discharge clock, a back-bias clock, a high-potential driving voltage, and a low-potential reference voltage, and connected in a cascade structure. An Nth (N is a positive integer) signal transmitter of the signal transmitters includes a first control node; a second control node; a first controller controlling charging and discharging of the first control node by using at least one transistor to which the back-bias clock is inputted; a second controller controlling charging and discharging of the second control node; a first output buffer outputting a carry pulse in response to voltages of the first and second control nodes; and a second output buffer outputting a gate pulse.