Gate Driving Circuit Buffer Transistor Chargeability Optimization
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Solution Overview
Problem
Conventional liquid crystal display (LCD) gate driving circuits experience malfunctions at high and low temperatures due to increased ripple voltage at the Q-node and decreased current driving ability, affecting reliability.
Innovation Solution
Incorporating a gate driving circuit with stages that include a pull-up transistor, a buffer transistor with twice the chargeability of the pull-up transistor, a discharge transistor, and a pull-down transistor, which helps maintain gate signal integrity by adjusting the ratio of driving current to capacitance, thereby preventing malfunctions across temperature ranges.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate driving circuit is used, then the circuit can operate at normal temperatures, but the circuit malfunctions at high and low temperatures due to increased ripple voltage and decreased current driving ability
Solution Approach 1:
The gate driving circuit is divided into multiple stages, with each stage independently controlled by separate transistors (pull-up, buffer, discharge, pull-down). This segmentation allows each transistor to be optimized for specific temperature conditions, improving overall reliability across temperature ranges.
Solution Approach 2:
The patent modifies the chargeability parameter of the buffer transistor to be about two times or greater than that of the pull-up transistor. This parameter change ensures proper voltage levels at the Q-node under varying temperature conditions, preventing malfunction while maintaining reliable operation.
2Speed
If the pull-up transistor size is increased to improve current driving ability at low temperature, then the rising and falling times improve, but the circuit becomes more complex and larger
Solution Approach 1:
Instead of using a single large pull-up transistor, the circuit segments the function across multiple transistors with specialized roles. The buffer transistor with enhanced chargeability handles the charging function efficiently, allowing the pull-up transistor to remain compact while achieving fast rising times.
Solution Approach 2:
By changing the chargeability parameter of the buffer transistor to be about two times or greater than the pull-up transistor, the patent achieves fast switching speeds without requiring oversized transistors. This parameter optimization maintains speed performance while controlling device complexity.
Data Source
AI summary
In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.