Gate Driving Circuit for Display Devices Reducing Voltage and Dead Space
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Solution Overview
Problem
Existing gate driving circuits for display devices face challenges in reducing the driving voltage and power consumption, particularly when transistors receiving the same gate signal are of the same type, leading to increased voltage and consumption. Additionally, the need to apply additional gate signals with opposite phases can result in increased dead space in the display device.
Innovation Solution
A gate driving circuit that simultaneously applies two gate signals with opposite phases to a pixel circuit, reducing the driving voltage and power consumption. The circuit includes a normal output circuit and an inverted output circuit, which output gate signals with opposite phases to different transistors in the pixel circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If transistors receiving the same gate signal are made same type (N-type or P-type), then the gate driving circuit can be simplified, but the driving voltage increases
Solution Approach 1:
The gate driving circuit is segmented into a normal output circuit and an inverted output circuit. The normal output circuit generates gate signals for N-type transistors, while the inverted output circuit generates gate signals for P-type transistors. This segmentation allows each circuit to be optimized for its specific transistor type, reducing the overall driving voltage requirement while maintaining circuit functionality.
2Adaptability or versatility
If additional gate driving circuit is added to apply gate signals with opposite phases, then the display device can drive both N-type and P-type transistors, but the dead space increases
Solution Approach 1:
The normal output circuit and inverted output circuit are merged into a single integrated gate driving circuit structure. Both circuits share common components such as the clock signal input, power supply connections, and transistor arrays. This merging approach enables the circuit to drive both N-type and P-type transistors with opposite phase signals while minimizing the total area occupied, thereby reducing dead space in the display device.
3Reliability
If driving voltage of gate driving circuit is increased, then the circuit can drive same type transistors effectively, but the power consumption increases
Solution Approach 1:
The gate driving circuit implements local quality by providing different voltage levels to different transistor types. The normal output circuit provides appropriate voltage levels for N-type transistors, while the inverted output circuit provides optimized voltage levels for P-type transistors. This localized optimization ensures each transistor type operates effectively at its optimal voltage level, improving reliability while minimizing overall power consumption.
Data Source
AI summary
A gate driving circuit includes a normal output circuit configured to output a first gate signal at a first output node and a second gate signal at a second output node in response to a previous first gate signal and a first clock signal. The first gate signal and the second gate signal are opposite in phase to each other, and the first gate signal and the second gate signal are applied to different transistors included in a pixel circuit.


