Gate Driving Circuit Layout for Compact Display Frame Area

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Solution Overview

Problem

Conventional display devices have a significant portion of their frame area occupied by gate driving circuits, which affects the appearance and functionality of the device.

Innovation Solution

The gate driving circuits are integrated between the pixel units within the display region, reducing the frame area by overlapping connection lines with data lines and extending in a direction that minimizes the occupied space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If gate driving circuits are disposed outside the display region in the frame area, then the circuits are easily布局和manufactured, but the frame area is significantly increased affecting the appearance

Engineering Contradiction:
Improvegate driving circuit layoutVSAvoidframe area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The gate driving circuits are moved from the traditional frame area (2D plane outside display region) into the display region, utilizing the vertical dimension and space between pixel rows. This dimensional repositioning allows circuits to occupy previously unused space within the display area, reducing frame area while maintaining manufacturability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate driving circuits are nested between the pixel units in the display region, specifically positioned between adjacent rows of pixel units. This nesting approach allows the circuits to be embedded within the existing pixel structure, effectively utilizing the space between pixel rows without requiring additional frame area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If gate driving circuits are disposed between pixel units in the display region, then the frame area is reduced, but the circuit layout complexity increases

Engineering Contradiction:
Improveframe areaVSAvoidcircuit layout
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The gate driving circuits are divided into multiple segments, with at least two gate driving circuits positioned between two adjacent rows of pixel units. This segmentation allows the circuits to be distributed across different regions between pixel rows, simplifying the overall layout by breaking down the complex circuit into manageable sections that can be independently routed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The connection lines are designed to serve multiple functions: they connect gate driving circuits to scan lines while also overlapping with data lines to reduce the number of separate conductors needed. This multi-functionality simplifies the layout by combining multiple routing functions into single structural elements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If connection lines overlap with data lines, then the number of connection lines can be reduced, but the risk of signal interference increases

Engineering Contradiction:
Improvenumber of connection linesVSAvoidsignal interference
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

An insulating layer is introduced as an intermediary between the connection lines and data lines that overlap each other. This insulating layer acts as a mediator that prevents direct electrical interaction between the two conductors, eliminating signal interference while allowing the lines to share the same physical space for routing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10692414B2Display device
Publication Date: 2020.06.23 AU OPTRONICS CORP
  • US10692414B2 patent drawing
  • US10692414B2 patent drawing
  • US10692414B2 patent drawing

AI summary

A display device includes a plurality of scan lines, a plurality of data lines, a plurality of pixel units, a plurality of gate driving circuits, and a plurality of connection lines. The scan lines extend in a first direction. The data lines extend in a second direction. The gate driving circuits extend in the first direction, and each of the gate driving circuits crosses through at least two of the pixel units. At least two gate driving circuits are included between two adjacent rows of the pixel units. The connection lines extend in the second direction and are electrically connected to the gate driving circuits. At least part of the connection lines overlap the data lines. The connection lines include a plurality of output lines and a plurality of signal lines. The output lines are electrically connected to the scan lines.