Gate Driving Circuit Dummy Shift Registers for RC Delay Reduction
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Solution Overview
Problem
High-resolution display devices face image display errors due to longer resistive-capacitive delays in scan signals generated by early stages of shift registers, leading to erroneous gray levels.
Innovation Solution
Incorporating dummy shift registers that generate and output dummy scan signals before the actual scan signals, which are sequentially outputted, to reduce resistive-capacitive delays in the gate driving circuit of display panels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dummy shift registers are added to reduce resistive-capacitive delays, then image display quality is improved, but device complexity increases
Solution Approach 1:
Dummy shift registers are added at the beginning of the shift register chain to generate dummy scan signals before the actual scan signals. This preliminary action allows the capacitive loads to be charged in advance, reducing the resistive-capacitive delays of the actual scan signals and preventing gray level display errors in high-resolution displays.
Solution Approach 2:
The dummy shift registers act as intermediary components between the signal source and the display panel. They generate intermediate dummy scan signals that prepare the capacitive loads, serving as a buffer that reduces the delay impact on the actual scan signals without directly affecting the display output.
2Manufacturing precision
If the number of shift register stages is increased for high-resolution displays, then display resolution is improved, but resistive-capacitive delays increase
Solution Approach 1:
By adding dummy shift registers at the beginning of the chain, the capacitive loads are charged in advance during the dummy signal generation phase. This preliminary charging action reduces the effective charge time required for subsequent actual scan signals, compensating for the increased total number of stages in high-resolution displays.
Data Source
AI summary
The invention provides a gate driving circuit and a display device. The gate driving circuit is configured to drive a display panel of the display device, and includes shift registers and at least a dummy shift register. The shift registers are respectively configured to generate and output scan signals to scan lines of the display panel, the dummy shift register is configured to generate a dummy scan signal before the scan signals are generated. The dummy scan signal and the scan signals are sequentially generated.