Gate Driving Circuit Leakage Current Reduction
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Solution Overview
Problem
Liquid crystal display devices experience abnormal display and degraded performance due to leakage current, particularly at high ambient temperatures, which is caused by transistors in gate driving circuits.
Innovation Solution
A gate driving circuit comprising a first and second driving module, along with a transistor, where the second driving module ensures the gate voltage of the transistor is set to a different voltage than the output signal voltage, preventing leakage current by maintaining a non-zero voltage difference, thereby keeping the transistor in the cut-off region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the transistor outputs the driving signal, then the gate driving circuit can scan the pixels, but leakage current occurs particularly at high ambient temperatures causing abnormal display
Solution Approach 1:
The patent changes the voltage parameters of the transistor by introducing a second driving module that sets the gate voltage to a different level (second voltage) than the output signal voltage (first voltage). This voltage parameter change creates a non-zero voltage difference that keeps the transistor in the cut-off region, reducing leakage current while maintaining scanning functionality
Solution Approach 2:
The second driving module acts as an intermediary between the first driving module and the transistor gate. It receives the first clock signal and generates appropriate gate voltage control signals that maintain the voltage difference, thereby mediating the relationship between the driving signal output and the transistor state to prevent leakage current
Data Source
AI summary
A gate driving circuit, a driving method and a display device, which belongs to the display field, are disclosed. The gate driving circuit has a first driving module, a second driving module and a first transistor. The first driving module is electrically connected with the first node and has an input signal terminal, a first clock signal terminal, a reset signal terminal, a first voltage terminal, a second clock signal terminal, and an output signal terminal. A first terminal of the first transistor is connected with a third clock signal terminal, and a second terminal is connected with the output signal terminal. The second driving module is electrically connected to the first node, the first clock signal terminal and the gate of the first transistor, and has a third clock signal terminal and a second voltage terminal.