Gate Driving Circuit Leakage Control via Preliminary Node Pull-Down

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Solution Overview

Problem

The existing gate driving circuits for liquid crystal displays face issues with electrical leakage and output delay due to the low level maintaining module, which limits the efficiency of the circuit, especially in high frame rate and high resolution applications.

Innovation Solution

A gate driving circuit design that includes cascaded gate driving units with a control module and low level maintaining modules, where the control module pulls down the second control node to a low level before outputting gate strobe signals, ensuring the low level maintaining module is in an off state to prevent electrical leakage and reduce output delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the low level maintaining transistor is used to maintain the low level of output signals, then the output level can be maintained, but electrical leakage occurs and output delay increases

Engineering Contradiction:
Improveoutput level maintenanceVSAvoidelectrical leakage
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The control module pulls down the control pole of the low level maintaining transistor to a low level before the output module outputs the gate strobe signal. This preliminary action ensures the transistor is fully turned off before operation, preventing electrical leakage during the non-output period while maintaining proper output level when needed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent dynamically controls the gate voltage of the low level maintaining transistor through the control module. By adjusting the control pole voltage in different time periods (high level during output, low level during non-output), the transistor's conduction state is dynamically optimized to eliminate leakage while maintaining output integrity.

Inventive Principle:
Principle #15Dynamics

2Reliability

If the low level maintaining transistor is used to maintain the low level of output signals, then the output level can be maintained, but the pull-up and pull-down delay of the output pulse increases

Engineering Contradiction:
Improveoutput level maintenanceVSAvoidoutput pulse delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The control module performs preliminary pulling down of the control pole before the output operation begins. This ensures the low level maintaining transistor is completely turned off in advance, eliminating any residual conduction that would cause delay in the output pulse transition, while still maintaining proper output levels when required.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If the control pole of the low level maintaining transistor is not completely pulled down, then the transistor remains partially conductive, but electrical leakage increases

Engineering Contradiction:
Improvetransistor conduction controlVSAvoidelectrical leakage
Core Design Contradiction:
Ease of operationVSLoss of energy

Solution Approach 1:

The control module completely pulls down the control pole to ensure the transistor is fully turned off before output operations. This preliminary action eliminates partial conduction states that would cause leakage, achieving complete switch-off while maintaining operational control when needed.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9972266B2Gate driving circuits and display devices
Publication Date: 2018.05.15 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US9972266B2 patent drawing
  • US9972266B2 patent drawing
  • US9972266B2 patent drawing

AI summary

A gate driving circuit and a display device are disclosed. The gate driving circuit includes a control module for pulling down the level of the second control node to be at the low level before the gate strobe signals are outputted and during the output period of the gate cutoff signals. In this way, the second pull-down control end of the low level maintaining module is pulled down to be at the low levels, and the low level maintaining module is in the off state. In this way, the electrical leakage of the low level maintaining module may be reduced so as to decrease the output delay of the gate signals and to enhance the efficiency of the circuit.