Gate Driving Circuit Multi-Level Voltage IGZO LTPS Stack
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Solution Overview
Problem
Existing gate driving circuits for display devices lack the capability to generate multi-level output voltages, which is essential for efficient control of pixel units in display panels.
Innovation Solution
The proposed gate driving circuit incorporates a stack-up structure of N-type Indium Gallium Zinc Oxide (IGZO) transistors and P-type low temperature polysilicon (LTPS) transistors, along with shift units and switch units, to generate multi-level output voltages. This circuit design includes multiple stages of shift registers and switch units that receive input signals and clock signals to produce enable output signals, allowing for the generation of clock signals with multi-level voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional gate driving circuit with single-level voltage is used, then the circuit structure is simple, but the control capability over pixel units is insufficient
Solution Approach 1:
The patent changes the voltage parameter from single-level to multi-level (including intermediate voltage levels) in the gate driving circuit. This allows the circuit to provide different voltage levels (first voltage, second voltage, third voltage) to control different states of pixel units, thereby enhancing control capability without fundamentally changing the circuit topology
Solution Approach 2:
The patent introduces dynamic voltage control by using shift registers to generate timing signals that dynamically switch between different voltage levels. The gate driving circuit dynamically adjusts the voltage level based on the scanning sequence, enabling flexible control of pixel units during different operational phases
2Productivity
If multi-level voltage generation is implemented, then the control over pixel units is enhanced, but the device complexity increases
Solution Approach 1:
The patent makes the gate driving circuit universal by enabling it to perform multiple control functions through a single multi-level voltage generation mechanism. The same shift register-based timing signal generation system controls different pixel unit states (on/off/intermediate) without requiring separate control circuits for each function
Solution Approach 2:
The patent ensures continuous operational efficiency by using shift registers to generate timing signals that continuously control the gate driving circuit's voltage output. The scanning sequence continuously progresses through different stages, maintaining productive operation without idle periods, and the multi-level voltage generation operates continuously to support various pixel control needs
Data Source
AI summary
An electronic device includes a substrate, a first transistor, a second transistor, an electronic unit and a conductor. The first transistor is disposed on the substrate and comprises a first semiconductor layer. The second transistor is disposed on the substrate and comprises a second semiconductor layer, wherein a material of the first semiconductor layer is different from a material of the second semiconductor layer. The electronic unit is disposed on the substrate and electrically connected to the second transistor. The conductor is electrically connected to the first semiconductor layer and the second semiconductor layer.