Gate Driving Circuit Noise Reduction for Display Devices

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Solution Overview

Problem

Conventional amorphous silicon gate (ASG) technology generates noise when driven for a long time, leading to reduced display quality due to ineffective noise control at high temperatures.

Innovation Solution

A gate driving circuit with multiple stages, including a first and second maintenance part, which output high and low voltages respectively, and maintain control parts at low voltages using node signals lower than clock signals to prevent voltage stress and noise generation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional ASG technology is used to reduce manufacturing costs and panel size, then integration of gate driving circuit is achieved, but noise is generated when temperature becomes high due to long-term driving

Engineering Contradiction:
Improvemanufacturing cost reductionVSAvoidnoise generation
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The gate driving circuit is divided into multiple stages (first stage, second stage, ..., m-th stage) where each stage independently drives a corresponding gate line. This segmentation allows for localized control and maintenance of signal levels, preventing noise propagation across the entire circuit while maintaining the integrated ASG structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces maintenance parts that actively regulate voltage parameters during operation. By dynamically adjusting and maintaining gate signal voltages within optimal ranges, the circuit prevents voltage stress accumulation that leads to noise generation at high temperatures, while preserving the cost-effective ASG integration.

Inventive Principle:
Principle #35Parameter changes

2Duration of action of moving object

If gate driving circuit is driven for long time to maintain display operation, then continuous image display is achieved, but temperature increases causing noise and reduced display quality

Engineering Contradiction:
Improvecontinuous driving capabilityVSAvoiddisplay quality
Core Design Contradiction:
Duration of action of moving objectVSReliability

Solution Approach 1:

The maintenance parts operate periodically to refresh and maintain gate signal voltage levels. By cyclically resetting voltages to their proper levels, the circuit prevents cumulative voltage stress and heat-related degradation, enabling continuous operation while maintaining display quality and reliability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The maintenance parts function as feedback mechanisms that continuously monitor and adjust gate signal voltages. This feedback control ensures that voltage levels remain stable during long-term operation, preventing noise generation and maintaining display quality even at elevated temperatures.

Inventive Principle:
Principle #23Feedback

3Speed

If high voltage is continuously output to maintain gate signal levels, then gate line driving is achieved, but voltage stress causes property variation and noise

Engineering Contradiction:
Improvesignal output speedVSAvoidvoltage level stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The maintenance parts perform preliminary actions by pre-charging and pre-discharging capacitors to prepare gate signals for the next switching cycle. This preliminary preparation reduces the peak voltage stress during actual switching operations, maintaining fast signal transitions while preventing property variations from excessive voltage stress.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8284149B2Gate driving circuit and display device having the gate driving circuit
Publication Date: 2012.10.09 SAMSUNG DISPLAY CO LTD
  • US8284149B2 patent drawing
  • US8284149B2 patent drawing
  • US8284149B2 patent drawing

AI summary

An output part outputs a high voltage of a first clock signal as a high voltage of an (m)-th gate signal (‘m’ is a natural number) and a low voltage in response to a high signal of an (m+1)-th gate signal outputted from an (m+1)-th stage. A first maintenance part maintains a control part of the pull-up part at a low voltage in response to an (m−1)-th node signal or an (m+1)-th node signal lower than a high signal of a second clock signal having a phase opposite to the phase of the first clock signal received from an (m−1)-th stage or the (m+1)-th stage. A second maintenance part maintains the low voltage of the (m)-th gate signal in response to the (m−1)-th node signal or the (m+1)-th node signal.