Gate Driving Circuit for Oxide Transistor Displays

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Solution Overview

Problem

Existing gate driving circuits for electroluminescent display devices face challenges in reducing power consumption, minimizing the non-display region (bezel) of the display panel, and maintaining stable output at low speed frequencies.

Innovation Solution

A gate driving circuit is designed to output gate signals to oxide transistors in the pixel circuit, incorporating a scan driving circuit that outputs two or more scan signals and simplifies the driving of these signals, thereby reducing power consumption and the bezel region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If a conventional gate driving circuit is used, then the circuit can operate, but power consumption is high and the non-display region (bezel) is large

Engineering Contradiction:
Improvepower consumptionVSAvoidnon-display region
Core Design Contradiction:
Use of energy by stationary objectVSArea of stationary object

Solution Approach 1:

The patent combines multiple scan signal output functions into a single integrated gate driving circuit. The circuit generates multiple scan signals (SCAN1, SCAN2, SCAN3) simultaneously through shared transistor networks and clock signal pathways, eliminating the need for separate driving circuits for each scan signal, thereby reducing the non-display region area while maintaining operational functionality.

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If the gate driving circuit is simplified to reduce the bezel region, then the non-display region is minimized, but maintaining stable output at low speed frequencies becomes difficult

Engineering Contradiction:
Improvebezel regionVSAvoidstable output
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The gate driving circuit is segmented into functionally independent modules: clock signal input stages, intermediate signal generation stages, and scan signal output stages. Each module handles specific signal processing tasks, allowing the circuit to maintain stable operation at low frequencies while keeping the overall design compact. The segmentation enables precise control of signal timing and voltage levels without requiring a large bezel region.

Inventive Principle:
Principle #1Segmentation

3Use of energy by stationary object

If oxide transistors are used in the pixel circuit, then power consumption is reduced, but the gate driving circuit requires specific signal characteristics for proper operation

Engineering Contradiction:
Improvepower consumptionVSAvoidsignal compatibility
Core Design Contradiction:
Use of energy by stationary objectVSAdaptability or versatility

Solution Approach 1:

The gate driving circuit incorporates parameter adjustment mechanisms that modify signal characteristics (voltage levels, pulse widths, timing) based on the requirements of oxide transistor pixel circuits. The circuit changes its output parameters dynamically to ensure proper operation of oxide transistors, which have different electrical characteristics compared to conventional transistors, thereby achieving low power consumption while maintaining signal compatibility.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12277894B2Gate driving circuit and electroluminescence display device using the same
Publication Date: 2025.04.15 LG DISPLAY CO LTD
  • US12277894B2 patent drawing
  • US12277894B2 patent drawing
  • US12277894B2 patent drawing

AI summary

A gate driving circuit includes: a first pull-down circuit controlled by a Q node to transmit a low voltage to a first output node; a first pull-up circuit controlled by a QB1 node to transmit a high voltage to the first output node; a QB2 node control circuit to transmit a voltage of the QB1 node to the QB2 node; a second pull-down circuit controlled by the Q node to transmit a low voltage to a second output node; and a second pull-up circuit controlled by the QB2 node to transmit a high voltage output clock signal to the second output node. A pulse width of a signal output to the first output node is the same as a pulse width of the Q node. A pulse width of a signal output to the second output node is the same as a pulse width of the output clock signal.