Gate Driving Circuit Pull-Down Holding Module for IGZO Threshold Drift
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Solution Overview
Problem
The positive bias temperature stress of IGZO-TFTs is unsatisfactory, leading to a positive drift of the voltage threshold, which slows down the speed of turning on IGZO-TFT devices and negatively impacts the GOA circuit.
Innovation Solution
A gate driving circuit with a multi-stage configuration, including a pull-down holding module with specific transistor connections and a dual inverter design, is implemented to maintain stable electric potentials and control signal terminals, ensuring normal switching and output signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IGZO-TFT is used to achieve high carrier mobility and fast response speed, then productivity is improved, but reliability deteriorates due to unsatisfactory positive bias temperature stress performance
Solution Approach 1:
The patent changes the electrical parameters of the IGZO-TFT by introducing specific doping elements (such as gallium) to modify the carrier concentration and mobility characteristics. This allows the device to maintain high productivity while improving stability under positive bias temperature stress conditions.
Solution Approach 2:
The patent employs composite material structures in the transistor channel layer, combining IGZO with other oxide materials or doping elements to create a composite semiconductor layer. This composite structure leverages the high mobility of IGZO while the additional materials provide improved stability and reduced threshold voltage drift under stress conditions.
2Productivity
If multi-stage gate driving units are connected in series to achieve row-by-row scanning, then productivity is improved, but device complexity increases
Solution Approach 1:
The gate driving circuit is segmented into multiple independent driving units, each responsible for driving a specific row of pixels. Each unit contains essential components (switching transistors, storage capacitors) that can be replicated, allowing systematic expansion from 1-stage to multi-stage configurations while maintaining manageable complexity through modular design.
Solution Approach 2:
The patent implements a nested structure where multi-stage gate driving units are systematically integrated, with each stage building upon the previous one. The circuit architecture allows inner stages to be contained within the overall multi-stage structure, enabling scalable expansion where N-stage configurations incorporate the functionality of (N-1) stages while adding one more row scanning capability.
Data Source
AI summary
Disclosed are a gate driving circuit and a liquid crystal display device. The gate driving circuit comprises multi-stages of gate driving units. A gate driving unit at each stage includes a pull-down holding module which maintains an electric potential at an output terminal of a gate driving unit at a present stage at a negative electric potential. The influence of a right drift of a threshold voltage of an eighty-second transistor on the gate driving unit can be avoided, and further a speed of pulling down an electric potential at a first node can be increased.