Gate Driving Circuit with Variable Pulse Widths for Display Panels
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Solution Overview
Problem
Current gate driving circuits in image display devices face limitations in adjusting the image data voltage charging period and light emission period for each pixel, which restricts the improvement of image quality due to fixed charging rates and limited pulse widths.
Innovation Solution
A gate driving circuit with multiple stages that output scan pulses with different pulse widths and phase delays in response to three-phase clock pulses, allowing for selective adjustment of voltage charging periods and charging rates for red, green, and blue pixels, thereby improving image display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If the frame period is extended to increase the image data voltage charging period, then the charging rate of pixels can be improved, but the frame rate of the display device decreases
Solution Approach 1:
The gate driving circuit is divided into multiple stages (first stage, second stage, third stage, etc.) that sequentially generate scan pulses with different pulse widths. Each stage processes different color sub-pixels (RGB) with optimized charging periods, allowing simultaneous charging of multiple pixel groups without extending the overall frame period. This segmentation enables parallel processing of pixel charging tasks.
Solution Approach 2:
The circuit uses periodic clock pulses (first clock pulse, second clock pulse, third clock pulse) with different pulse widths to control the charging periods of different pixel groups. By alternating between these periodic signals with varying widths, the system achieves optimized charging rates for different pixels while maintaining a consistent frame rate, as the periodic pattern repeats within each frame cycle.
2Productivity
If the pulse width is increased to improve the light emission period, then the charging rate of pixels can be enhanced, but the resolution and detail of displayed images may be compromised
Solution Approach 1:
Different pulse widths are applied to different color sub-pixels based on their specific charging requirements. Green sub-pixels receive wider pulses due to their greater grayscale voltage difference, blue sub-pixels receive appropriately widened pulses for their high voltage values, while red sub-pixels receive standard pulse widths. This localized optimization ensures each pixel group achieves optimal charging rate without compromising overall image quality.
Solution Approach 2:
The circuit dynamically changes the pulse width parameter of scan pulses based on the specific charging characteristics of different pixel groups. By adjusting the pulse width parameter selectively for different color sub-pixels rather than using a uniform width, the system optimizes charging rates for each pixel type while maintaining image display quality through precise parameter control.
3Ease of manufacture
If a single gate driving circuit drives all gate lines with uniform pulse widths, then the circuit design is simple, but the charging rates of different pixel groups cannot be optimized
Solution Approach 1:
The gate driving circuit is segmented into multiple functional stages, each responsible for generating scan pulses with specific pulse widths for different pixel groups. This segmentation provides the adaptability to optimize charging rates for different pixels while maintaining a modular structure that remains relatively simple to manufacture and implement.
Solution Approach 2:
The multi-stage gate driving circuit serves multiple functions simultaneously: it generates scan pulses for different gate lines, applies different pulse widths to different pixel groups, and maintains overall circuit coordination. This multi-functionality allows the circuit to adapt to different pixel charging requirements without requiring separate dedicated circuits for each pixel type, preserving ease of manufacture.
Data Source
AI summary
A gate driving circuit and an image display device including the gate driving circuit are provided. In some embodiments of the present disclosure, the gate driving circuit includes a plurality of stages configured to sequentially and repeatedly output a plurality of scan pulses having different pulse widths in response to a gate control signal applied from a timing controller and the plurality of stages sequentially generate the plurality of scan pulses having different pulse widths and phase-delayed in response to three-phase clock pulses among the gate control signals and sequentially supply the plurality of scan pulses to gate lines of a display panel to selectively adjust a light emission period or a color display period for each red pixel, green pixel, and blue pixel, thereby improving image quality.